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/freebsd/sys/contrib/device-tree/Bindings/soc/fsl/cpm_qe/
H A Dcpm.txt7 * Root CPM node
10 - compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe".
11 - reg : A 48-byte region beginning with CPCR.
14 cpm@119c0 {
15 #address-cells = <1>;
16 #size-cells = <1>;
17 #interrupt-cells = <2>;
18 compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
22 * Properties common to multiple CPM/QE devices
24 - fsl,cpm-command : This value is ORed with the opcode and command flag
[all …]
H A Dserial.txt4 - fsl,cpm1-smc-uart
5 - fsl,cpm2-smc-uart
6 - fsl,cpm1-scc-uart
7 - fsl,cpm2-scc-uart
8 - fsl,qe-uart
11 property as described in booting-without-of.txt, section IX.1 in the following
23 compatible = "fsl,mpc8272-scc-uart",
24 "fsl,cpm2-scc-uart";
27 interrupt-parent = <&PIC>;
28 fsl,cpm-brg = <1>;
[all …]
H A Dnetwork.txt4 - fsl,cpm1-scc-enet
5 - fsl,cpm2-scc-enet
6 - fsl,cpm1-fec-enet
7 - fsl,cpm2-fcc-enet (third resource is GFEMR)
8 - fsl,qe-enet
13 compatible = "fsl,mpc8272-fcc-enet",
14 "fsl,cpm2-fcc-enet";
16 local-mac-address = [ 00 00 00 00 00 00 ];
18 interrupt-parent = <&PIC>;
19 phy-handle = <&PHY0>;
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dep8248e.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
12 #address-cells = <1>;
13 #size-cells = <1>;
16 planetcore-SMC1 = &smc1;
17 planetcore-SCC1 = &scc1;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <32>;
32 i-cache-line-size = <32>;
[all …]
H A Dmpc866ads.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
24 d-cache-line-size = <16>; // 16 bytes
25 i-cache-line-size = <16>; // 16 bytes
26 d-cache-size = <0x2000>; // L1, 8K
27 i-cache-size = <0x4000>; // L1, 16K
[all …]
H A Dmpc885ads.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
24 d-cache-line-size = <16>;
25 i-cache-line-size = <16>;
26 d-cache-size = <8192>;
27 i-cache-size = <8192>;
[all …]
H A Dmgcoge.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <0>;
28 d-cache-line-size = <32>;
29 i-cache-line-size = <32>;
30 d-cache-size = <16384>;
31 i-cache-size = <16384>;
[all …]
H A Dpq2fads.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <32>;
32 i-cache-line-size = <32>;
33 d-cache-size = <16384>;
[all …]
H A Dmpc8272ads.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
24 #address-cells = <1>;
25 #size-cells = <0>;
30 d-cache-line-size = <32>;
31 i-cache-line-size = <32>;
32 d-cache-size = <16384>;
33 i-cache-size = <16384>;
[all …]
H A Dep88xc.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
24 d-cache-line-size = <16>;
25 i-cache-line-size = <16>;
26 d-cache-size = <8192>;
27 i-cache-size = <8192>;
[all …]
H A Dtqm8xx.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <16>; // 16 bytes
32 i-cache-line-size = <16>; // 16 bytes
33 d-cache-size = <0x1000>; // L1, 4K
34 i-cache-size = <0x1000>; // L1, 4K
[all …]
H A Dksi8560.dts15 /dts-v1/;
22 #address-cells = <1>;
23 #size-cells = <1>;
32 #address-cells = <1>;
33 #size-cells = <0>;
38 d-cache-line-size = <32>;
39 i-cache-line-size = <32>;
40 d-cache-size = <0x8000>; /* L1, 32K */
41 i-cache-size = <0x8000>; /* L1, 32K */
42 timebase-frequency = <0>; /* From U-boot */
[all …]
H A Dtqm8560.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
16 #address-cells = <1>;
17 #size-cells = <1>;
29 #address-cells = <1>;
30 #size-cells = <0>;
35 d-cache-line-size = <32>;
36 i-cache-line-size = <32>;
37 d-cache-size = <32768>;
38 i-cache-size = <32768>;
[all …]
H A Dadder875-uboot.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Device Tree Source for MPC885 ADS running U-Boot
9 /dts-v1/;
12 compatible = "analogue-and-micro,adder875";
13 #address-cells = <1>;
14 #size-cells = <1>;
23 #address-cells = <1>;
24 #size-cells = <0>;
29 d-cache-line-size = <16>;
30 i-cache-line-size = <16>;
[all …]
H A Dadder875-redboot.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
9 /dts-v1/;
12 compatible = "analogue-and-micro,adder875";
13 #address-cells = <1>;
14 #size-cells = <1>;
23 #address-cells = <1>;
24 #size-cells = <0>;
29 d-cache-line-size = <16>;
30 i-cache-line-size = <16>;
31 d-cache-size = <8192>;
[all …]
H A Dstx_gp3_8560.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * STX GP3 - 8560 ADS Device Tree Source
8 /dts-v1/;
14 compatible = "stx,gp3-8560", "stx,gp3";
15 #address-cells = <1>;
16 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
32 d-cache-line-size = <32>;
33 i-cache-line-size = <32>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dfsl,cpm-enet.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,cpm-enet.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Network for cpm enet
10 - Frank Li <Frank.Li@nxp.com>
15 - enum:
16 - fsl,cpm1-scc-enet
17 - fsl,cpm2-scc-enet
18 - fsl,cpm1-fec-enet
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dmpc8560ads.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
29 #address-cells = <1>;
30 #size-cells = <0>;
35 d-cache-line-size = <32>; // 32 bytes
36 i-cache-line-size = <32>; // 32 bytes
37 d-cache-size = <0x8000>; // L1, 32K
38 i-cache-size = <0x8000>; // L1, 32K
[all …]
/freebsd/sys/dev/qat/qat_api/common/crypto/sym/qat/
H A Dlac_sym_qat.c1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
46 LAC_LOG_ERROR("slice hang detected on CPM cipher slice."); in LacSymQat_SymLogSliceHangError()
51 LAC_LOG_ERROR("slice hang detected on CPM auth slice."); in LacSymQat_SymLogSliceHangError()
62 "slice hang detected on CPM cipher or auth slice."); in LacSymQat_SymLogSliceHangError()
81 LAC_MEM_SHARED_READ_TO_PTR(pRespMsgFn->opaque_data, pOpaqueData); in LacSymQat_SymRespHandler()
83 lacCmdId = pRespMsgFn->comn_resp.cmd_id; in LacSymQat_SymRespHandler()
84 opStatus = pRespMsgFn->comn_resp.comn_status; in LacSymQat_SymRespHandler()
85 comnErr = pRespMsgFn->comn_resp.comn_error.s.comn_err_code; in LacSymQat_SymRespHandler()
96 /* call the response message handler registered for the command ID */ in LacSymQat_SymRespHandler()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/fsl/cpm_qe/cpm/
H A Di2c.txt3 The I2C controller is expressed as a bus under the CPM node.
6 - compatible : "fsl,cpm1-i2c", "fsl,cpm2-i2c"
7 - reg : On CPM2 devices, the second resource doesn't specify the I2C
10 - #address-cells : Should be one. The cell is the i2c device address with
12 - #size-cells : Should be zero.
13 - clock-frequency : Can be used to set the i2c clock frequency. If
17 - linux,i2c-index : Can be used to hard code an i2c bus number. By default,
19 - linux,i2c-class : Can be used to override the i2c class. The class is used
28 compatible = "fsl,mpc823-i2c",
29 "fsl,cpm1-i2c";
[all …]
H A Dusb.txt4 - compatible : "fsl,cpm1-usb", "fsl,cpm2-usb", "fsl,qe-usb"
8 #address-cells = <1>;
9 #size-cells = <0>;
10 compatible = "fsl,cpm2-usb";
13 interrupt-parent = <&PIC>;
14 fsl,cpm-command = <2e600000>;
/freebsd/sys/dev/qat/qat_api/firmware/include/
H A Dicp_qat_fw.h1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
33 * - Unless otherwise stated, all structures are defined in LITTLE ENDIAN
37 * - In general all data structures provided to a request should be aligned
79 * Common Request - Block sizes definitions in multiples of individual long
109 ICP_QAT_FW_COMN_RESP_SERV_CPM_FW, /**< CPM FW Service ID */
125 ICP_QAT_FW_COMN_REQ_CPM_FW_PKE = 3, /**< CPM FW PKE Request */
126 ICP_QAT_FW_COMN_REQ_CPM_FW_LA = 4, /**< CPM FW Lookaside Request */
127 ICP_QAT_FW_COMN_REQ_CPM_FW_DMA = 7, /**< CPM FW DMA Request */
128 ICP_QAT_FW_COMN_REQ_CPM_FW_COMP = 9, /**< CPM FW Compression Request */
[all …]
/freebsd/sys/dev/qat/qat_hw/qat_c4xxx/
H A Dadf_c4xxx_ras.c1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
16 if (accel_dev->ras_counters) in adf_sysctl_read_ras_correctable()
17 counter = atomic_read(&accel_dev->ras_counters[ADF_RAS_CORR]); in adf_sysctl_read_ras_correctable()
27 if (accel_dev->ras_counters) in adf_sysctl_read_ras_uncorrectable()
28 counter = atomic_read(&accel_dev->ras_counters[ADF_RAS_UNCORR]); in adf_sysctl_read_ras_uncorrectable()
38 if (accel_dev->ras_counters) in adf_sysctl_read_ras_fatal()
39 counter = atomic_read(&accel_dev->ras_counters[ADF_RAS_FATAL]); in adf_sysctl_read_ras_fatal()
50 if (!ret && value != 0 && accel_dev->ras_counters) { in adf_sysctl_write_ras_reset()
67 accel_dev->ras_counters = kcalloc(ADF_RAS_ERRORS, in adf_init_ras()
[all …]
/freebsd/sys/dev/qat/qat_api/common/crypto/sym/include/
H A Dlac_sym_hash.h30 * In-place and out-of-place processing is supported for all modes. The
41 * - \ref LacCommon
42 * - \ref LacSymQat "Symmetric QAT": Hash uses the lookup table provided by
48 * - OSAL : For memory functions, atomics and locking
72 * pre-computes as we need the state that uses the initialiser constants
81 * precomputed result. The Pre-compute operation involves deriving 3 128-bit
82 * keys (K1, K2 and K3) from the 128-bit secret key K.
84 * - K1 = 0x01010101010101010101010101010101 encrypted with Key K
85 * - K2 = 0x02020202020202020202020202020202 encrypted with Key K
86 * - K3 = 0x03030303030303030303030303030303 encrypted with Key K
[all …]
/freebsd/sys/dev/qat/qat_api/common/crypto/sym/
H A Dlac_sym_alg_chain.c101 for (i = 0; i < pBufferList->numBuffers; i++) { in LacSymAlgChain_PtrFromOffsetGet()
102 Cpa8U *pCurrData = pBufferList->pBuffers[i].pData; in LacSymAlgChain_PtrFromOffsetGet()
103 Cpa32U currDataSize = pBufferList->pBuffers[i].dataLenInBytes; in LacSymAlgChain_PtrFromOffsetGet()
111 *ppDataPtr = pCurrData + (packetOffset - currentOffset); in LacSymAlgChain_PtrFromOffsetGet()
139 switch (pSessionDesc->cipherAlgorithm) { in LacSymCheck_IsPartialSupported()
152 switch (pSessionDesc->hashAlgorithm) { in LacSymCheck_IsPartialSupported()
170 switch (pSessionDesc->symOperation) { in LacSymCheck_IsPartialSupported()
188 if (ICP_QAT_FW_LA_USE_UCS_SLICE_TYPE == pSessionDesc->cipherSliceType) { in LacSymCheck_IsPartialSupported()
194 pSessionDesc->isPartialSupported = isPartialSupported; in LacSymCheck_IsPartialSupported()
218 pCipherData->cipherKeyLenInBytes, in LacAlgChain_CipherCDBuild_ForOptimisedCD()
[all …]

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