Searched +full:cp110 +full:- +full:icu +full:- +full:sei (Results 1 – 6 of 6) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
| H A D | marvell,cp110-icu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/marvell,cp110-icu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 - Miquel Raynal <miquel.raynal@bootlin.com> 9 - Thomas Petazzoni <thomas.petazzoni@bootlin.com> 11 title: Marvell ICU Interrupt Controller 14 The Marvell ICU (Interrupt Consolidation Unit) controller is responsible for 15 collecting all wired-interrupt sources in the CP and communicating them to the 18 memory areas depending on their type (NSR, SR, SEI, REI, etc). [all …]
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| H A D | marvell,icu.txt | 1 Marvell ICU Interrupt Controller 2 -------------------------------- 4 The Marvell ICU (Interrupt Consolidation Unit) controller is 5 responsible for collecting all wired-interrupt sources in the CP and 9 their type (NSR, SR, SEI, REI, etc). 13 - compatible: Should be "marvell,cp110-icu" 15 - reg: Should contain ICU registers location and length. 17 Subnodes: Each group of interrupt is declared as a subnode of the ICU, 22 - compatible: Should be one of: 23 * "marvell,cp110-icu-nsr" [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/arm/marvell/ |
| H A D | cp110-system-controller.txt | 1 Marvell Armada CP110 System Controller 4 The CP110 is one of the two core HW blocks of the Marvell Armada 7K/8K 6 giving access to numerous features: clocks, pin-muxing and many other 11 - compatible: must be: "syscon", "simple-mfd"; 12 - reg: register area of the CP110 system controller 18 --- [all...] |
| /freebsd/sys/arm/mv/ |
| H A D | mv_cp110_icu.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 47 #include <dt-bindings/interrupt-controller/irq.h> 90 { -1, 0 } 94 {"marvell,cp110-icu-nsr", ICU_TYPE_NSR}, 95 {"marvell,cp110-icu-sei", ICU_TYPE_SEI}, 99 #define RD4(sc, reg) bus_read_4((sc)->res, (reg)) 100 #define WR4(sc, reg, val) bus_write_4((sc)->res, (reg), (val)) 109 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) in mv_cp110_icu_probe() 125 sc->dev = dev; in mv_cp110_icu_attach() [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
| H A D | armada-cp11x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/interrupt-controller/mvebu-icu.h> 9 #include <dt-bindings/thermal/thermal.h> 11 #include "armada-common.dtsi" 27 thermal-zones { 28 CP11X_LABEL(thermal_ic): CP11X_NODE_NAME(ic-thermal) { 29 polling-delay-passive = <0>; /* Interrupt driven */ 30 polling-delay = <0>; /* Interrupt driven */ 32 thermal-sensors = <&CP11X_LABEL(thermal) 0>; 42 cooling-maps { }; [all …]
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| /freebsd/sys/arm64/conf/ |
| H A D | std.marvell | 19 device mv_cp110_icu # Marvell CP110 ICU 21 device mv_ap806_sei # Marvell AP806 SEI 23 # Real-time clock support 24 device mv_rtc # Marvell Real-time Clock 27 device safexcel # Inside Secure EIP-97 37 device uart_ns8250 # ns8250-type UART driver 58 device a37x0_xtal # Marvell xtal-clock 59 device a37x0_tbg # Marvell tbg-clock 60 device a37x0_nb_periph # Marvell north-bridge peripheral clock 61 device a37x0_sb_periph # Maravell south-bridge peripheral clock
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