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Searched +full:coreclk +full:- +full:mux (Results 1 – 8 of 8) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dqoriq-clock.txt14 --------------- -------------
21 - compatible: Should contain a chip-specific clock block compatible
22 string and (if applicable) may contain a chassis-version clock
25 Chip-specific strings are of the form "fsl,<chip>-clockgen", such as:
26 * "fsl,p2041-clockgen"
27 * "fsl,p3041-clockgen"
28 * "fsl,p4080-clockgen"
29 * "fsl,p5020-clockgen"
30 * "fsl,p5040-clockgen"
31 * "fsl,t1023-clockgen"
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H A Dfsl,qoriq-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/fsl,qoriq-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
24 --------------- -------------
36 - items:
37 - enum:
38 - fsl,p2041-clockgen
39 - fsl,p3041-clockgen
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/freebsd/sys/contrib/device-tree/Bindings/soc/ti/
H A Dti,pruss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 TI Programmable Real-Time Unit and Industrial Communication Subsystem
11 - Suman Anna <s-anna@ti.com>
15 The Programmable Real-Time Unit and Industrial Communication Subsystem
16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
23 peripheral interfaces, fast real-time responses, or specialized data handling.
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/freebsd/sys/arm64/qoriq/clk/
H A Dqoriq_clkgen.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
55 { -1, 0 }
96 if (sc->flags & QORIQ_LITTLE_ENDIAN) in qoriq_clkgen_write_4()
97 bus_write_4(sc->res, addr, htole32(val)); in qoriq_clkgen_write_4()
99 bus_write_4(sc->res, addr, htobe32(val)); in qoriq_clkgen_write_4()
110 if (sc->flags & QORIQ_LITTLE_ENDIAN) in qoriq_clkgen_read_4()
111 *val = le32toh(bus_read_4(sc->res, addr)); in qoriq_clkgen_read_4()
113 *val = be32toh(bus_read_4(sc->res, addr)); in qoriq_clkgen_read_4()
126 if (sc->flags & QORIQ_LITTLE_ENDIAN) in qoriq_clkgen_modify_4()
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/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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H A Dk3-am64-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
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H A Dk3-j721e-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/phy/phy-ti.h>
9 #include <dt-bindings/mux/mux.h>
11 #include "k3-serdes.h"
14 cmn_refclk: clock-cmnrefclk {
15 #clock-cells = <0>;
16 compatible = "fixed-clock";
17 clock-frequency = <0>;
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H A Dk3-am62-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 #interrupt-cells = <3>;
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