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/linux/arch/powerpc/boot/dts/fsl/
H A Dp1020rdb-pc_camp_core0.dts3 * P1020 RDB-PC Core0 Device Tree Source in CAMP mode.
7 * This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb,
10 * Please note to add "-b 0" for core0's dts compiling.
H A Dmpc8572ds_camp_core0.dts3 * MPC8572 DS Core0 Device Tree Source in CAMP mode.
7 * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0,
/linux/Documentation/devicetree/bindings/media/
H A Dqcom,sdm845-venus.yaml38 video-core0:
93 - video-core0
116 video-core0 {
/linux/arch/arm64/boot/dts/amd/
H A Delba-16core.dtsi13 core0 { cpu = <&cpu0>; };
20 core0 { cpu = <&cpu4>; };
27 core0 { cpu = <&cpu8>; };
34 core0 { cpu = <&cpu12>; };
H A Damd-seattle-cpus.dtsi10 core0 {
18 core0 {
26 core0 {
34 core0 {
/linux/arch/arm/boot/dts/intel/axm/
H A Daxm5516-cpus.dtsi15 core0 {
29 core0 {
43 core0 {
57 core0 {
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhip05.dtsi27 core0 {
41 core0 {
55 core0 {
69 core0 {
H A Dhip07.dtsi27 core0 {
42 core0 {
57 core0 {
72 core0 {
87 core0 {
102 core0 {
117 core0 {
132 core0 {
147 core0 {
162 core0 {
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am654.dtsi16 core0 {
26 core0 {
H A Dk3-j784s4.dtsi22 core0 {
40 core0 {
H A Dk3-j7200.dtsi28 core0 {
146 <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, /* MCU R5F Core0 */
H A Dk3-j721s2.dtsi32 core0 {
153 <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, /* MCU R5F Core0 */
H A Dk3-am642.dtsi19 core0 {
H A Dk3-am652.dtsi16 core0 {
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5422-cpus.dtsi26 core0 {
41 core0 {
H A Dexynos5420-cpus.dtsi27 core0 {
42 core0 {
/linux/tools/perf/pmu-events/arch/arm64/freescale/imx94/sys/
H A Dmetrics.json179 "BriefDescription": "bytes of m33 core0 read from ddr",
187 "BriefDescription": "bytes of m33 core0 write to ddr",
195 "BriefDescription": "bytes of m7 core0 read from ddr",
203 "BriefDescription": "bytes of m7 core0 write to ddr",
/linux/arch/arm64/boot/dts/apple/
H A Dt600x-common.dtsi24 core0 {
33 core0 {
48 core0 {
/linux/arch/arm/boot/dts/hisilicon/
H A Dhip04.dtsi31 core0 {
45 core0 {
59 core0 {
73 core0 {
/linux/arch/arm64/boot/dts/arm/
H A Djuno-r1.dts42 core0 {
51 core0 {
H A Djuno.dts41 core0 {
50 core0 {
H A Djuno-r2.dts42 core0 {
51 core0 {
/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v2-kryo-cpu.yaml187 core0 {
197 core0 {
/linux/drivers/tty/hvc/
H A Dhvc_dcc.c94 * then we assume then this function will be called first on core0. That way,
95 * dcc_core0_available will be true only if it's available on core0.
/linux/Documentation/devicetree/bindings/cpu/
H A Dcpu-capacity.txt74 core0 {
83 core0 {

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