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/linux/drivers/mfd/
H A Dsi476x-i2c.c3 * drivers/mfd/si476x-i2c.c -- Core device driver for si476x MFD
21 #include <linux/mfd/si476x-core.h>
29 * @core: Core device structure
36 static int si476x_core_config_pinmux(struct si476x_core *core) in si476x_core_config_pinmux() argument
39 dev_dbg(&core->client->dev, "Configuring pinmux\n"); in si476x_core_config_pinmux()
40 err = si476x_core_cmd_dig_audio_pin_cfg(core, in si476x_core_config_pinmux()
41 core->pinmux.dclk, in si476x_core_config_pinmux()
42 core->pinmux.dfs, in si476x_core_config_pinmux()
43 core->pinmux.dout, in si476x_core_config_pinmux()
44 core->pinmux.xout); in si476x_core_config_pinmux()
[all …]
H A Dwl1273-core.c9 #include <linux/mfd/wl1273-core.h>
13 #define DRIVER_DESC "WL1273 FM Radio Core"
21 static int wl1273_fm_read_reg(struct wl1273_core *core, u8 reg, u16 *value) in wl1273_fm_read_reg() argument
23 struct i2c_client *client = core->client; in wl1273_fm_read_reg()
38 static int wl1273_fm_write_cmd(struct wl1273_core *core, u8 cmd, u16 param) in wl1273_fm_write_cmd() argument
40 struct i2c_client *client = core->client; in wl1273_fm_write_cmd()
53 static int wl1273_fm_write_data(struct wl1273_core *core, u8 *data, u16 len) in wl1273_fm_write_data() argument
55 struct i2c_client *client = core->client; in wl1273_fm_write_data()
75 * @core: A pointer to the device struct.
80 static int wl1273_fm_set_audio(struct wl1273_core *core, unsigned int new_mode) in wl1273_fm_set_audio() argument
[all …]
/linux/drivers/media/platform/qcom/venus/
H A Dpm_helpers.c18 #include "core.h"
26 static int core_clks_get(struct venus_core *core) in core_clks_get() argument
28 const struct venus_resources *res = core->res; in core_clks_get()
29 struct device *dev = core->dev; in core_clks_get()
33 core->clks[i] = devm_clk_get(dev, res->clks[i]); in core_clks_get()
34 if (IS_ERR(core->clks[i])) in core_clks_get()
35 return PTR_ERR(core->clks[i]); in core_clks_get()
41 static int core_clks_enable(struct venus_core *core) in core_clks_enable() argument
43 const struct venus_resources *res = core->res; in core_clks_enable()
44 const struct freq_tbl *freq_tbl = core->res->freq_tbl; in core_clks_enable()
[all …]
H A Dfirmware.c20 #include "core.h"
28 static void venus_reset_cpu(struct venus_core *core) in venus_reset_cpu() argument
30 u32 fw_size = core->fw.mapped_mem_size; in venus_reset_cpu()
33 if (IS_IRIS2_1(core)) in venus_reset_cpu()
34 wrapper_base = core->wrapper_tz_base; in venus_reset_cpu()
36 wrapper_base = core->wrapper_base; in venus_reset_cpu()
45 if (IS_IRIS2_1(core)) { in venus_reset_cpu()
57 int venus_set_hw_state(struct venus_core *core, bool resume) in venus_set_hw_state() argument
61 if (core->use_tz) { in venus_set_hw_state()
69 venus_reset_cpu(core); in venus_set_hw_state()
[all …]
/linux/drivers/net/wireless/broadcom/b43/
H A Dradio_2055.h11 #define B2055_C1_SP_RSSI 0x03 /* SP RSSI Core 1 */
12 #define B2055_C1_SP_PDMISC 0x04 /* SP PD MISC Core 1 */
13 #define B2055_C2_SP_RSSI 0x05 /* SP RSSI Core 2 */
14 #define B2055_C2_SP_PDMISC 0x06 /* SP PD MISC Core 2 */
15 #define B2055_C1_SP_RXGC1 0x07 /* SP RX GC1 Core 1 */
16 #define B2055_C1_SP_RXGC2 0x08 /* SP RX GC2 Core 1 */
17 #define B2055_C2_SP_RXGC1 0x09 /* SP RX GC1 Core 2 */
18 #define B2055_C2_SP_RXGC2 0x0A /* SP RX GC2 Core 2 */
19 #define B2055_C1_SP_LPFBWSEL 0x0B /* SP LPF BW select Core 1 */
20 #define B2055_C2_SP_LPFBWSEL 0x0C /* SP LPF BW select Core 2 */
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/linux/drivers/bcma/
H A Dmain.c36 struct bcma_device *core = container_of(dev, struct bcma_device, dev); in manuf_show() local
37 return sprintf(buf, "0x%03X\n", core->id.manuf); in manuf_show()
43 struct bcma_device *core = container_of(dev, struct bcma_device, dev); in id_show() local
44 return sprintf(buf, "0x%03X\n", core->id.id); in id_show()
50 struct bcma_device *core = container_of(dev, struct bcma_device, dev); in rev_show() local
51 return sprintf(buf, "0x%02X\n", core->id.rev); in rev_show()
57 struct bcma_device *core = container_of(dev, struct bcma_device, dev); in class_show() local
58 return sprintf(buf, "0x%X\n", core->id.class); in class_show()
90 struct bcma_device *core; in bcma_find_core_unit() local
92 list_for_each_entry(core, &bus->cores, list) { in bcma_find_core_unit()
[all …]
H A Dcore.c3 * Core ops
12 static bool bcma_core_wait_value(struct bcma_device *core, u16 reg, u32 mask, in bcma_core_wait_value() argument
19 val = bcma_aread32(core, reg); in bcma_core_wait_value()
26 bcma_warn(core->bus, "Timeout waiting for register 0x%04X!\n", reg); in bcma_core_wait_value()
31 bool bcma_core_is_enabled(struct bcma_device *core) in bcma_core_is_enabled() argument
33 if ((bcma_aread32(core, BCMA_IOCTL) & (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC)) in bcma_core_is_enabled()
36 if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET) in bcma_core_is_enabled()
42 void bcma_core_disable(struct bcma_device *core, u32 flags) in bcma_core_disable() argument
44 if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET) in bcma_core_disable()
47 bcma_core_wait_value(core, BCMA_RESET_ST, ~0, 0, 300); in bcma_core_disable()
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H A Dhost_pci.c14 static void bcma_host_pci_switch_core(struct bcma_device *core) in bcma_host_pci_switch_core() argument
16 int win2 = core->bus->host_is_pcie2 ? in bcma_host_pci_switch_core()
19 pci_write_config_dword(core->bus->host_pci, BCMA_PCI_BAR0_WIN, in bcma_host_pci_switch_core()
20 core->addr); in bcma_host_pci_switch_core()
21 pci_write_config_dword(core->bus->host_pci, win2, core->wrap); in bcma_host_pci_switch_core()
22 core->bus->mapped_core = core; in bcma_host_pci_switch_core()
23 bcma_debug(core->bus, "Switched to core: 0x%X\n", core->id.id); in bcma_host_pci_switch_core()
26 /* Provides access to the requested core. Returns base offset that has to be
28 static u16 bcma_host_pci_provide_access_to_core(struct bcma_device *core) in bcma_host_pci_provide_access_to_core() argument
30 switch (core->id.id) { in bcma_host_pci_provide_access_to_core()
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/linux/drivers/staging/media/meson/vdec/
H A Dvdec_hevc.c29 struct amvdec_core *core = sess->core; in vdec_hevc_load_firmware() local
30 struct device *dev = core->dev_dec; in vdec_hevc_load_firmware()
50 mc_addr = dma_alloc_coherent(core->dev, MC_SIZE, &mc_addr_map, in vdec_hevc_load_firmware()
59 amvdec_write_dos(core, HEVC_MPSR, 0); in vdec_hevc_load_firmware()
60 amvdec_write_dos(core, HEVC_CPSR, 0); in vdec_hevc_load_firmware()
62 amvdec_write_dos(core, HEVC_IMEM_DMA_ADR, mc_addr_map); in vdec_hevc_load_firmware()
63 amvdec_write_dos(core, HEVC_IMEM_DMA_COUNT, MC_SIZE / 4); in vdec_hevc_load_firmware()
64 amvdec_write_dos(core, HEVC_IMEM_DMA_CTRL, (0x8000 | (7 << 16))); in vdec_hevc_load_firmware()
66 while (i && (readl(core->dos_base + HEVC_IMEM_DMA_CTRL) & 0x8000)) in vdec_hevc_load_firmware()
74 dma_free_coherent(core->dev, MC_SIZE, mc_addr, mc_addr_map); in vdec_hevc_load_firmware()
[all …]
H A Dvdec_1.c29 struct amvdec_core *core = sess->core; in vdec_1_load_firmware() local
30 struct device *dev = core->dev_dec; in vdec_1_load_firmware()
48 mc_addr = dma_alloc_coherent(core->dev, MC_SIZE, in vdec_1_load_firmware()
57 amvdec_write_dos(core, MPSR, 0); in vdec_1_load_firmware()
58 amvdec_write_dos(core, CPSR, 0); in vdec_1_load_firmware()
60 amvdec_clear_dos_bits(core, MDEC_PIC_DC_CTRL, BIT(31)); in vdec_1_load_firmware()
62 amvdec_write_dos(core, IMEM_DMA_ADR, mc_addr_map); in vdec_1_load_firmware()
63 amvdec_write_dos(core, IMEM_DMA_COUNT, MC_SIZE / 4); in vdec_1_load_firmware()
64 amvdec_write_dos(core, IMEM_DMA_CTRL, (0x8000 | (7 << 16))); in vdec_1_load_firmware()
66 while (--i && amvdec_read_dos(core, IMEM_DMA_CTRL) & 0x8000); in vdec_1_load_firmware()
[all …]
H A Dcodec_mpeg12.c53 static int codec_mpeg12_can_recycle(struct amvdec_core *core) in codec_mpeg12_can_recycle() argument
55 return !amvdec_read_dos(core, MREG_BUFFERIN); in codec_mpeg12_can_recycle()
58 static void codec_mpeg12_recycle(struct amvdec_core *core, u32 buf_idx) in codec_mpeg12_recycle() argument
60 amvdec_write_dos(core, MREG_BUFFERIN, buf_idx + 1); in codec_mpeg12_recycle()
65 struct amvdec_core *core = sess->core; in codec_mpeg12_start() local
74 mpeg12->workspace_vaddr = dma_alloc_coherent(core->dev, SIZE_WORKSPACE, in codec_mpeg12_start()
78 dev_err(core->dev, "Failed to request MPEG 1/2 Workspace\n"); in codec_mpeg12_start()
88 amvdec_write_dos(core, POWER_CTL_VLD, BIT(4)); in codec_mpeg12_start()
89 amvdec_write_dos(core, MREG_CO_MV_START, in codec_mpeg12_start()
92 amvdec_write_dos(core, MPEG1_2_REG, 0); in codec_mpeg12_start()
[all …]
/linux/include/trace/events/
H A Dclk.h17 TP_PROTO(struct clk_core *core),
19 TP_ARGS(core),
22 __string( name, core->name )
34 TP_PROTO(struct clk_core *core),
36 TP_ARGS(core)
41 TP_PROTO(struct clk_core *core),
43 TP_ARGS(core)
48 TP_PROTO(struct clk_core *core),
50 TP_ARGS(core)
55 TP_PROTO(struct clk_core *core),
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/linux/drivers/clk/
H A Dclk.c54 struct clk_core *core; member
103 struct clk_core *core; member
114 static int clk_pm_runtime_get(struct clk_core *core) in clk_pm_runtime_get() argument
116 if (!core->rpm_enabled) in clk_pm_runtime_get()
119 return pm_runtime_resume_and_get(core->dev); in clk_pm_runtime_get()
122 static void clk_pm_runtime_put(struct clk_core *core) in clk_pm_runtime_put() argument
124 if (!core->rpm_enabled) in clk_pm_runtime_put()
127 pm_runtime_put_sync(core->dev); in clk_pm_runtime_put()
148 struct clk_core *core, *failed; in clk_pm_runtime_get_all() local
161 hlist_for_each_entry(core, &clk_rpm_list, rpm_node) { in clk_pm_runtime_get_all()
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/linux/drivers/gpu/drm/omapdrm/dss/
H A Dhdmi4_cec.c56 static void hdmi_cec_received_msg(struct hdmi_core_data *core) in hdmi_cec_received_msg() argument
58 u32 cnt = hdmi_read_reg(core->base, HDMI_CEC_RX_COUNT) & 0xff; in hdmi_cec_received_msg()
71 msg.msg[0] = hdmi_read_reg(core->base, in hdmi_cec_received_msg()
73 msg.msg[1] = hdmi_read_reg(core->base, in hdmi_cec_received_msg()
79 hdmi_read_reg(core->base, reg); in hdmi_cec_received_msg()
82 cec_received_msg(core->adap, &msg); in hdmi_cec_received_msg()
85 hdmi_write_reg(core->base, HDMI_CEC_RX_CONTROL, 1); in hdmi_cec_received_msg()
87 while (hdmi_read_reg(core->base, HDMI_CEC_RX_CONTROL) & 1) in hdmi_cec_received_msg()
93 cnt = hdmi_read_reg(core->base, HDMI_CEC_RX_COUNT) & 0xff; in hdmi_cec_received_msg()
97 void hdmi4_cec_irq(struct hdmi_core_data *core) in hdmi4_cec_irq() argument
[all …]
/linux/tools/perf/pmu-events/arch/x86/
H A Dmapfile.csv2 GenuineIntel-6-(97|9A|B7|BA|BF),v1.27,alderlake,core
3 GenuineIntel-6-BE,v1.27,alderlaken,core
4 GenuineIntel-6-(1C|26|27|35|36),v5,bonnell,core
5 GenuineIntel-6-(3D|47),v29,broadwell,core
6 GenuineIntel-6-56,v11,broadwellde,core
7 GenuineIntel-6-4F,v22,broadwellx,core
8 GenuineIntel-6-55-[56789ABCDEF],v1.22,cascadelakex,core
9 GenuineIntel-6-9[6C],v1.05,elkhartlake,core
10 GenuineIntel-6-CF,v1.09,emeraldrapids,core
11 GenuineIntel-6-5[CF],v13,goldmont,core
[all …]
/linux/drivers/media/platform/amphion/
H A Dvpu_rpc.h9 #include <media/videobuf2-core.h>
27 struct vpu_core *core; member
47 int (*boot_core)(struct vpu_core *core);
48 int (*shutdown_core)(struct vpu_core *core);
49 int (*restore_core)(struct vpu_core *core);
50 int (*get_power_state)(struct vpu_core *core);
51 int (*on_firmware_loaded)(struct vpu_core *core);
114 struct vpu_iface_ops *vpu_core_get_iface(struct vpu_core *core);
116 int vpu_iface_check_memory_region(struct vpu_core *core, dma_addr_t addr, u32 size);
118 static inline bool vpu_iface_check_codec(struct vpu_core *core) in vpu_iface_check_codec() argument
[all …]
H A Dvpu_mbox.c20 struct vpu_core *core = container_of(rx, struct vpu_core, rx); in vpu_mbox_rx_callback() local
22 vpu_isr(core, *(u32 *)msg); in vpu_mbox_rx_callback()
56 int vpu_mbox_init(struct vpu_core *core) in vpu_mbox_init() argument
58 scnprintf(core->tx_type.name, sizeof(core->tx_type.name) - 1, "tx0"); in vpu_mbox_init()
59 core->tx_type.block = true; in vpu_mbox_init()
61 scnprintf(core->tx_data.name, sizeof(core->tx_data.name) - 1, "tx1"); in vpu_mbox_init()
62 core->tx_data.block = false; in vpu_mbox_init()
64 scnprintf(core->rx.name, sizeof(core->rx.name) - 1, "rx"); in vpu_mbox_init()
65 core->rx.block = true; in vpu_mbox_init()
70 int vpu_mbox_request(struct vpu_core *core) in vpu_mbox_request() argument
[all …]
/linux/drivers/net/can/esd/
H A Desdacc.c39 /* Two bit wide command masks to mask or unmask a single core IRQ */
47 static void acc_resetmode_enter(struct acc_core *core) in acc_resetmode_enter() argument
49 acc_set_bits(core, ACC_CORE_OF_CTRL, in acc_resetmode_enter()
53 acc_resetmode_entered(core); in acc_resetmode_enter()
56 static void acc_resetmode_leave(struct acc_core *core) in acc_resetmode_leave() argument
58 acc_clear_bits(core, ACC_CORE_OF_CTRL, in acc_resetmode_leave()
62 acc_resetmode_entered(core); in acc_resetmode_leave()
65 static void acc_txq_put(struct acc_core *core, u32 acc_id, u32 acc_dlc, in acc_txq_put() argument
68 acc_write32_noswap(core, ACC_CORE_OF_TXFIFO_DATA_1, in acc_txq_put()
70 acc_write32_noswap(core, ACC_CORE_OF_TXFIFO_DATA_0, in acc_txq_put()
[all …]
/linux/arch/parisc/kernel/
H A Dhardware.c317 {HPHW_A_DMA, 0x005, 0x00039, 0x80, "KittyHawk CSY Core SCSI"},
323 {HPHW_A_DMA, 0x005, 0x0003B, 0x80, "KittyHawk CSY Core FW-SCSI"},
344 {HPHW_A_DMA, 0x015, 0x00089, 0x80, "KittyHawk GSY Core FW-SCSI"},
348 {HPHW_A_DMA, 0x032, 0x00089, 0x80, "Raven T' Core FW-SCSI"},
349 {HPHW_A_DMA, 0x03B, 0x00089, 0x80, "Raven U/L2 Core FW-SCSI"},
350 {HPHW_A_DMA, 0x03C, 0x00089, 0x80, "Merlin 132 Core FW-SCSI"},
351 {HPHW_A_DMA, 0x03D, 0x00089, 0x80, "Merlin 160 Core FW-SCSI"},
352 {HPHW_A_DMA, 0x044, 0x00089, 0x80, "Mohawk Core FW-SCSI"},
377 {HPHW_BA, 0x004, 0x00070, 0x0, "Cobra Core BA"},
378 {HPHW_BA, 0x005, 0x00070, 0x0, "Coral Core BA"},
[all …]
/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/
H A Dchip.c77 /* ARM CR4 core specific control flag bits */
80 /* D11 core specific control flag bits */
84 /* chip core base & ramsize */
86 /* SDIO device core, ID 0x829 */
88 /* internal memory core, ID 0x80e */
90 /* ARM Cortex M3 core, ID 0x82a */
230 /* assured first core is chipcommon, second core is buscore */
234 bool (*iscoreup)(struct brcmf_core_priv *core);
235 void (*coredisable)(struct brcmf_core_priv *core, u32 prereset,
237 void (*resetcore)(struct brcmf_core_priv *core, u32 prereset, u32 reset,
[all …]
/linux/sound/soc/qcom/qdsp6/
H A Dq6core.c72 struct q6core *core = dev_get_drvdata(&adev->dev); in q6core_callback() local
83 core->get_version_supported = false; in q6core_callback()
84 core->resp_received = true; in q6core_callback()
88 core->fwk_version_supported = false; in q6core_callback()
89 core->resp_received = true; in q6core_callback()
93 core->get_state_supported = false; in q6core_callback()
94 core->resp_received = true; in q6core_callback()
104 core->fwk_version = kmemdup(data->payload, in q6core_callback()
108 if (!core->fwk_version) in q6core_callback()
111 core->fwk_version_supported = true; in q6core_callback()
[all …]
/linux/drivers/iio/common/cros_ec_sensors/
H A Dcros_ec_sensors.c31 struct cros_ec_sensors_core_state core; member
47 mutex_lock(&st->core.cmd_lock); in cros_ec_sensors_read()
51 ret = st->core.read_ec_sensors_data(indio_dev, 1 << idx, &data); in cros_ec_sensors_read()
58 st->core.param.cmd = MOTIONSENSE_CMD_SENSOR_OFFSET; in cros_ec_sensors_read()
59 st->core.param.sensor_offset.flags = 0; in cros_ec_sensors_read()
61 ret = cros_ec_motion_send_host_cmd(&st->core, 0); in cros_ec_sensors_read()
67 st->core.calib[i].offset = in cros_ec_sensors_read()
68 st->core.resp->sensor_offset.offset[i]; in cros_ec_sensors_read()
70 *val = st->core.calib[idx].offset; in cros_ec_sensors_read()
73 st->core.param.cmd = MOTIONSENSE_CMD_SENSOR_SCALE; in cros_ec_sensors_read()
[all …]
/linux/drivers/phy/broadcom/
H A Dphy-bcm-sr-pcie.c42 * @core: pointer to the Stingray PCIe PHY core control
47 struct sr_pcie_phy_core *core; member
53 * struct sr_pcie_phy_core - Stingray PCIe PHY core control
76 * core and associated serdes has been enabled as RC and is available for use
81 /* PIPEMUX = 1, EP 1x8 + RC 1x8, core 7 */
120 static u32 pipemux_strap_read(struct sr_pcie_phy_core *core) in pipemux_strap_read() argument
130 pipemux = readl(core->base + PCIE_PIPEMUX_CFG_OFFSET); in pipemux_strap_read()
133 regmap_read(core->cdru, CDRU_STRAP_DATA_LSW_OFFSET, &pipemux); in pipemux_strap_read()
142 * Given a PIPEMUX strap and PCIe core index, this function returns true if the
143 * PCIe core needs to be enabled
[all …]
/linux/include/linux/bcma/
H A Dbcma.h44 u8 (*read8)(struct bcma_device *core, u16 offset);
45 u16 (*read16)(struct bcma_device *core, u16 offset);
46 u32 (*read32)(struct bcma_device *core, u16 offset);
47 void (*write8)(struct bcma_device *core, u16 offset, u8 value);
48 void (*write16)(struct bcma_device *core, u16 offset, u16 value);
49 void (*write32)(struct bcma_device *core, u16 offset, u32 value);
51 void (*block_read)(struct bcma_device *core, void *buffer,
53 void (*block_write)(struct bcma_device *core, const void *buffer,
57 u32 (*aread32)(struct bcma_device *core, u16 offset);
58 void (*awrite32)(struct bcma_device *core, u16 offset, u32 value);
[all …]
/linux/drivers/media/pci/cx88/
H A Dcx88-i2c.c46 struct cx88_core *core = data; in cx8800_bit_setscl() local
49 core->i2c_state |= 0x02; in cx8800_bit_setscl()
51 core->i2c_state &= ~0x02; in cx8800_bit_setscl()
52 cx_write(MO_I2C, core->i2c_state); in cx8800_bit_setscl()
58 struct cx88_core *core = data; in cx8800_bit_setsda() local
61 core->i2c_state |= 0x01; in cx8800_bit_setsda()
63 core->i2c_state &= ~0x01; in cx8800_bit_setsda()
64 cx_write(MO_I2C, core->i2c_state); in cx8800_bit_setsda()
70 struct cx88_core *core = data; in cx8800_bit_getscl() local
79 struct cx88_core *core = data; in cx8800_bit_getsda() local
[all …]

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