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Searched +full:continuous +full:- +full:burst +full:- +full:clk (Results 1 – 12 of 12) sorted by relevance

/linux/Documentation/devicetree/bindings/memory-controllers/fsl/
H A Dfsl,imx-weim.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
16 wireless and mobile applications that use low-power technology. The actual
21 pattern: "^memory-controller@[0-9a-f]+$"
25 - enum:
26 - fsl,imx1-weim
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/linux/drivers/bus/
H A Dimx-weim.c11 #include <linux/clk.h>
19 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
78 { .compatible = "fsl,imx1-weim", .data = &imx1_weim_devtype, },
80 { .compatible = "fsl,imx27-weim", .data = &imx27_weim_devtype, },
82 { .compatible = "fsl,imx50-weim", .data = &imx50_weim_devtype, },
83 { .compatible = "fsl,imx6q-weim", .data = &imx50_weim_devtype, },
85 { .compatible = "fsl,imx51-weim", .data = &imx51_weim_devtype, },
92 struct device_node *np = pdev->dev.of_node; in imx_weim_gpr_setup()
107 gpr = syscon_regmap_lookup_by_phandle(np, "fsl,weim-cs-gpr"); in imx_weim_gpr_setup()
109 dev_dbg(&pdev->dev, "failed to find weim-cs-gpr\n"); in imx_weim_gpr_setup()
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/linux/drivers/usb/host/
H A Dxhci-mtk.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <linux/clk.h>
31 #define XHCI_MTK_BW_INDEX(x) ((x) & (XHCI_MTK_MAX_ESIT - 1))
41 * @in_ss_cnt: the count of Start-Split for IN eps
68 * @esit: unit is 125us, equal to 2 << Interval field in ep-context
70 * @num_budget_microframes: number of continuous uframes
87 * continuous uframes
90 * @burst_mode: burst mode for scheduling. 0: normal burst mode,
91 * distribute the bMaxBurst+1 packets for a single burst
92 * according to @pkts and @repeat, repeate the burst multiple
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dst,stm32-fmc2-ebi-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
11 - Marek Vasut <marex@denx.de>
14 st,fmc2-ebi-cs-transaction-type:
33 st,fmc2-ebi-cs-cclk-enable:
34 description: Continuous clock enable (first bank must be configured
40 st,fmc2-ebi-cs-mux-enable:
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/linux/drivers/usb/gadget/udc/
H A Dm66592-udc.h1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2006-2007 Renesas Solutions Corp.
13 #include <linux/clk.h>
17 #define M66592_XTAL 0xC000 /* b15-14: Crystal selection */
26 #define M66592_HSE 0x0080 /* b7: Hi-speed enable */
28 #define M66592_DMRPD 0x0020 /* b5: D- pull down control */
30 #define M66592_FSRPC 0x0004 /* b2: Full-speed receiver enable */
35 #define M66592_LNST 0x0003 /* b1-0: D+, D- line status */
47 #define M66592_RHST 0x0003 /* b1-0: Reset handshake status */
48 #define M66592_HSMODE 0x0003 /* Hi-Speed mode */
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/linux/drivers/gpu/drm/mcde/
H A Dmcde_dsi.c1 // SPDX-License-Identifier: GPL-2.0+
2 #include <linux/clk.h>
47 struct clk *hs_clk;
48 struct clk *lp_clk;
73 d = host_to_mcde_dsi(mdsi->host); in mcde_dsi_irq()
75 dev_dbg(d->dev, "%s called\n", __func__); in mcde_dsi_irq()
77 val = readl(d->regs + DSI_DIRECT_CMD_STS_FLAG); in mcde_dsi_irq()
79 dev_dbg(d->dev, "DSI_DIRECT_CMD_STS_FLAG = %08x\n", val); in mcde_dsi_irq()
81 dev_dbg(d->dev, "direct command write completed\n"); in mcde_dsi_irq()
84 dev_dbg(d->dev, "direct command TE received\n"); in mcde_dsi_irq()
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/linux/drivers/dma/
H A Dtegra20-apb-dma.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
9 #include <linux/clk.h>
12 #include <linux/dma-mapping.h>
102 * If any burst is in flight and DMA paused then this is the time to complete
103 * on-flight burst and update DMA status register.
144 * sub-transfer as per requester details and hw support.
201 /* Channel-slave specific configuration */
213 struct clk *dma_clk;
232 writel(val, tdma->base_addr + reg); in tdma_write()
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/linux/drivers/media/pci/tw5864/
H A Dtw5864-reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * TW5864 driver - registers description
8 /* According to TW5864_datasheet_0.6d.pdf, tw5864b1-ds.pdf */
10 /* Register Description - Direct Map Space */
11 /* 0x0000 ~ 0x1ffc - H264 Register Map */
23 /* Enable bit for Host Burst Access */
76 * 0->3 4 VLC data buffer in DDR (1M each)
77 * 0->7 8 VLC data buffer in DDR (512k each)
147 /* DDR-DPR Burst Read Enable */
157 * 0 Single R/W Access (Host <-> DDR)
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/linux/drivers/gpu/drm/bridge/
H A Dsamsung-dsim.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/clk.h>
18 #include <linux/media-bus-format.h>
25 #include <drm/bridge/samsung-dsim.h>
112 #define DSIM_MAIN_VRESOL(x, num_bits) (((x) & ((1 << (num_bits)) - 1)) << 16)
113 #define DSIM_MAIN_HRESOL(x, num_bits) (((x) & ((1 << (num_bits)) - 1)) << 0)
501 * downstream driver - drivers/gpu/drm/bridge/sec-dsim.c
536 writel(val, dsi->reg_base + dsi->driver_data->reg_ofs[idx]); in samsung_dsim_write()
541 return readl(dsi->reg_base + dsi->driver_data->reg_ofs[idx]); in samsung_dsim_read()
546 if (wait_for_completion_timeout(&dsi->completed, msecs_to_jiffies(300))) in samsung_dsim_wait_for_reset()
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/linux/arch/powerpc/include/asm/
H A Dcpm2.h1 /* SPDX-License-Identifier: GPL-2.0 */
27 /* Device sub-block and page codes.
72 /* CPM2-specific opcodes (see cpm.h for common opcodes)
106 extern void __cpm2_setbrg(uint brg, uint rate, uint clk, int div16, int src);
153 * get some microcode patches :-).
154 * The parameter ram space for the SMCs is fifty-some bytes, and
353 uint sen_tbuf0data0; /* Save area 0 - current frame */
354 uint sen_tbuf0data1; /* Save area 1 - current frame */
365 uint sen_tbuf1data0; /* Save area 0 - current frame */
366 uint sen_tbuf1data1; /* Save area 1 - current frame */
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/linux/drivers/net/ethernet/marvell/
H A Dskge.h1 /* SPDX-License-Identifier: GPL-2.0 */
133 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
134 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
262 CHIP_ID_YUKON_LITE = 0xb1, /* Chip ID for YUKON-Lite (Rev. A1-A3) */
263 CHIP_ID_YUKON_LP = 0xb2, /* Chip ID for YUKON-LP */
264 CHIP_ID_YUKON_XL = 0xb3, /* Chip ID for YUKON-2 XL */
265 CHIP_ID_YUKON_EC = 0xb6, /* Chip ID for YUKON-2 EC */
266 CHIP_ID_YUKON_FE = 0xb7, /* Chip ID for YUKON-2 FE */
268 CHIP_REV_YU_LITE_A1 = 3, /* Chip Rev. for YUKON-Lite A1,A2 */
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/linux/drivers/net/wireless/realtek/rtl8xxxu/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2014 - 2017 Jes Sorensen <Jes.Sorensen@gmail.com>
8 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
25 static int rtl8xxxu_dma_agg_timeout = -1;
26 static int rtl8xxxu_dma_agg_pages = -1;
53 MODULE_PARM_DESC(dma_agg_timeout, "Set DMA aggregation timeout (range 1-127)");
55 MODULE_PARM_DESC(dma_agg_pages, "Set DMA aggregation pages (range 1-127, 0 to disable)");
616 struct usb_device *udev = priv->udev; in rtl8xxxu_read8()
620 if (priv->rtl_chip == RTL8710B && addr <= 0xff) in rtl8xxxu_read8()
623 mutex_lock(&priv->usb_buf_mutex); in rtl8xxxu_read8()
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