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/linux/Documentation/timers/
H A Dhighres.rst8 https://www.kernel.org/doc/ols/2006/ols2006v1-pages-333-346.pdf
11 http://www.cs.columbia.edu/~nahum/w6998/papers/ols2006-hrtimers-slides.pdf
23 - hrtimer base infrastructure
24 - timeofday and clock source management
25 - clock event management
26 - high resolution timer functionality
27 - dynamic ticks
31 ---------------------------
40 - time ordered enqueueing into a rb-tree
41 - independent of ticks (the processing is based on nanoseconds)
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/linux/arch/arm/mach-omap2/
H A Dclockdomain.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2008-2011 Texas Instruments, Inc.
6 * Copyright (C) 2008-2011 Nokia Corporation
22 #include <linux/clk-provider.h>
56 if (!strcmp(name, temp_clkdm->name)) { in _clkdm_lookup()
66 * _clkdm_register - register a clockdomain
70 * Returns -EINVAL if given a null pointer, -EEXIST if a clockdomain is
77 if (!clkdm || !clkdm->name) in _clkdm_register()
78 return -EINVAL; in _clkdm_register()
80 pwrdm = pwrdm_lookup(clkdm->pwrdm.name); in _clkdm_register()
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H A Dprm_common.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Tero Kristo <t-kristo@ti.com>
24 #include <linux/clk-provider.h>
76 * prm_ll_data: function pointers to SoC-specific implementations of
92 for (i = 0; i < prcm_irq_setup->nr_regs; i++) { in omap_prcm_events_filter_priority()
94 events[i] & prcm_irq_setup->priority_mask[i]; in omap_prcm_events_filter_priority()
113 int nr_irq = prcm_irq_setup->nr_regs * 32; in omap_prcm_irq_handler()
118 * re-enable the interrupts, at which point the in omap_prcm_irq_handler()
125 if (prcm_irq_setup->suspended) { in omap_prcm_irq_handler()
126 prcm_irq_setup->save_and_clear_irqen(prcm_irq_setup->saved_mask); in omap_prcm_irq_handler()
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/linux/drivers/pinctrl/intel/
H A Dpinctrl-intel.h1 /* SPDX-License-Identifier: GPL-2.0 */
26 * struct intel_pingroup - Description about group of pins
38 * struct intel_function - Description about a function
48 * struct intel_padgroup - Hardware pad group information
67 * enum - Special treatment for GPIO base in pad group
74 INTEL_GPIO_BASE_ZERO = -2,
75 INTEL_GPIO_BASE_NOMAP = -1,
84 .size = ((e) - (s) + 1), \
89 * struct intel_community - Intel pin community description
109 * @pad_map: Optional non-linear mapping of the pads
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/linux/arch/alpha/include/asm/
H A Dcacheflush.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 /* Note that the following two definitions are _highly_ dependent
30 that icache entries are tagged with the ASN and load a new mm context. */
41 if (vma->vm_flags & VM_EXEC) { in flush_icache_user_page()
42 struct mm_struct *mm = vma->vm_mm; in flush_icache_user_page()
43 if (current->active_mm == mm) in flush_icache_user_page()
46 mm->context[smp_processor_id()] = 0; in flush_icache_user_page()
67 #include <asm-generic/cacheflush.h>
/linux/drivers/net/ethernet/ti/icssg/
H A Dicssg_switch_map.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
49 /* VLAN-FID Table offset. 4096 VIDs. 2B per VID = 8KB = 0x2000 */
52 /* VLAN-FID Table offset for EMAC */
112 /* pktTxDelay for P1 = link speed dependent p1 mac delay + p1 phy delay */
115 /* pktTxDelay for P2 = link speed dependent p2 mac delay + p2 phy delay */
173 * cut-through/S&F.
219 /* 16B for Host Egress MSMC Q (Pre-emptible) context */
231 /* 16B for Host Egress MSMC Q (Express) context */
/linux/Documentation/admin-guide/pm/
H A Dsuspend-flows.rst1 .. SPDX-License-Identifier: GPL-2.0
12 At least one global system-wide transition needs to be carried out for the
14 :doc:`sleep states <sleep-states>`. Hibernation requires more than one
16 referred to as *system-wide suspend* (or simply *system suspend*) states, need
22 be clear from the context) and the transition back from the sleep state into the
27 significant differences between the :ref:`suspend-to-idle <s2idle>` code flows
28 and the code flows related to the :ref:`suspend-to-RAM <s2ram>` and
31 The :ref:`suspend-to-RAM <s2ram>` and :ref:`standby <standby>` sleep states
33 boils down to the platform-specific actions carried out by the suspend and
37 *platform-dependent suspend* states in what follows.
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/linux/drivers/usb/misc/sisusbvga/
H A Dsisusb.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
3 * sisusb - usb kernel driver for Net2280/SiS315 based USB2VGA dongles
83 p->header = cpu_to_le16(p->header); \
84 p->address = cpu_to_le32(p->address); \
85 p->data = cpu_to_le32(p->data); \
93 struct sisusb_urb_context { /* urb->context for outbound bulk URBs */
148 #define SISUSB_EP_UNKNOWN_04 0x04 /* ? 4 is "OUT" ? - unused */
214 #define SISCOLIDXR SISUSB_PCI_IOPORTBASE + COLREGOFFSET - 1
253 __u8 data0; /* operation dependent */
254 __u8 data1; /* operation dependent */
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/linux/drivers/infiniband/hw/hfi1/
H A Dsdma_txreq.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
13 * struct sdma_desc - canonical fragment descriptor
23 /* Release reference to @pinning_ctx. May be called in interrupt context. Must not sleep. */
28 * struct sdma_txreq - the sdma_txreq structure (one per packet)
40 * The method of allocation of the overloaded structure is user dependent
74 /* private: - used in coalesce/pad processing */
76 /* private: - down-counted to trigger last */
94 return tx->num_desc; in sdma_txreq_built()
/linux/Documentation/trace/coresight/
H A Dcoresight-etm4x-reference.rst11 ---------------------------
20 ----
37 ----
47 ----
52 - > 0 : Programs up the hardware with the current values held in the driver
55 - = 0 : disable trace hardware.
60 ----
72 ----
77 When FEAT_TRF is implemented, value of TRFCR_ELx.TS used for trace session. Otherwise -1
86 ----
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/linux/tools/testing/selftests/kvm/
H A Drseq_test.c1 // SPDX-License-Identifier: GPL-2.0-only
33 * Any bug related to task migration is likely to be timing-dependent; perform
89 * is in-progress, while a completely different count indicates in migration_worker()
96 * stable, i.e. while changing affinity is in-progress. in migration_worker()
106 * Wait 1-10us before proceeding to the next iteration and more in migration_worker()
113 * NOTIFY_RESUME) is handled in KVM context in migration_worker()
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/linux/Documentation/locking/
H A Dpreempt-locking.rst2 Proper Locking Under a Preemptible Kernel: Keeping Kernel Code Preempt-Safe
21 RULE #1: Per-CPU data structures need explicit protection
32 First, since the data is per-CPU, it may not have explicit SMP locking, but
44 Under preemption, the state of the CPU must be protected. This is arch-
45 dependent, but includes CPU structures and state not preserved over a context
48 if the kernel is executing a floating-point instruction and is then preempted.
84 n-times in a code path, and preemption will not be reenabled until the n-th
93 disabling preemption - any cond_resched() or cond_resched_lock() might trigger
95 reschedule. So use this implicit preemption-disabling property only if you
102 cpucache_t *cc; /* this is per-CPU */
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/linux/Documentation/mm/
H A Dhighmem.rst19 refer to as 'highmem'. There are various architecture dependent constraints on
30 +--------+ 0xffffffff
32 +--------+ 0xc0000000
36 +--------+ 0x00000000
39 time, but because we need virtual address space for other things - including
40 temporary maps to access the rest of the physical memory - the actual direct
43 Other architectures that have mm context tagged TLBs can have separate kernel
45 space when they use mm context tags.
54 * kmap_local_page(), kmap_local_folio() - These functions are used to create
55 short term mappings. They can be invoked from any context (including
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H A Dvmalloced-kernel-stacks.rst1 .. SPDX-License-Identifier: GPL-2.0
12 --------
19 ------------
23 it difficult to isolate and root-cause.
33 is architecture dependent.
40 --------------------
45 - vmalloc space must be large enough to hold many kernel stacks. This
46 may rule out many 32-bit architectures.
47 - Stacks in vmalloc space need to work reliably. For example, if
53 - If the stack overflows into a guard page, something reasonable
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/linux/include/uapi/linux/
H A Dethtool.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
23 * have the same layout for 32-bit and 64-bit userland.
35 * struct ethtool_cmd - DEPRECATED, link control and status
40 * interface supports autonegotiation or auto-detection.
41 * Read-only.
45 * auto-detection.
53 * @autoneg: Enable/disable autonegotiation and auto-detection;
57 * Read-only.
59 * obsoleted by &struct ethtool_coalesce. Read-only; deprecated.
61 * obsoleted by &struct ethtool_coalesce. Read-only; deprecated.
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/linux/arch/openrisc/kernel/
H A Dprocess.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
13 * This file handles the architecture-dependent parts of process handling...
50 * Used at user space -> kernel transitions.
63 /* Whoops - the platform was unable to reboot. Tell the user! */ in machine_restart()
64 pr_emerg("Reboot failed -- System halted\n"); in machine_restart()
69 * This is used if a sys-off handler was not set by a power management
80 * here to freeze the system for e.g. post-mortem debug purpose when
89 /* If or when software power-off is implemented, add code here. */
129 * Copy the thread-specific (arch specific) info from the current
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/linux/drivers/scsi/aic94xx/
H A Daic94xx_reg_def.h1 /* SPDX-License-Identifier: GPL-2.0-only */
32 * CHIM Registers, Address Range : (0x00-0xFF)
172 /* 0x38 - 0x3C are reserved */
197 /* 0x58h - 0xFCh are reserved */
200 * DCH_SAS Registers, Address Range : (0x800-0xFFF)
291 /* 0x83Ch - 0xFFCh are reserved */
294 * ARP2 External Processor Registers, Address Range : (0x00-0x1F)
349 /* 0x14h - 0x1Ch are reserved */
352 * ARP2 Registers, Address Range : (0x00-0x1F)
470 * CSEQ Host Register, Address Range : (0x000-0xFFC)
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/linux/sound/soc/sof/
H A Dipc4-priv.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
15 #include "sof-priv.h"
30 * struct sof_ipc4_fw_module - IPC4 module info
44 * struct sof_ipc4_fw_library - IPC4 library information
47 * ID number between 1 and (sof_ipc4_fw_data.max_libs_count - 1)
62 * struct sof_ipc4_fw_data - IPC4-specific data
75 * @fw_context_save: Firmware supports full context save and restore
78 * @load_library: Callback function for platform dependent library loading
/linux/drivers/pci/
H A Dtsm.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright(c) 2024-2025 Intel Corporation. All rights reserved.
13 #include <linux/pci-doe.h>
14 #include <linux/pci-tsm.h>
35 return tsm->tsm_dev->pci_ops; in to_pci_tsm_ops()
40 return pdev->tsm && pdev->tsm->dsm_dev == pdev; in is_dsm()
45 return pdev->devcap & PCI_EXP_DEVCAP_TEE; in has_tee()
48 /* 'struct pci_tsm_pf0' wraps 'struct pci_tsm' when ->dsm_dev == ->pdev (self) */
54 * ->tsm context to a 'struct pci_tsm_pf0 *'. in to_pci_tsm_pf0()
56 struct pci_dev *pf0 = tsm->dsm_dev; in to_pci_tsm_pf0()
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/linux/drivers/soundwire/
H A Dcadence_master.h1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* Copyright(c) 2015-17 Intel Corporation. */
107 * struct sdw_cdns - Cadence driver context
111 * @ip_offset: version-dependent offset to access IP_MCP registers and fields
120 * @dai_runtime_array: runtime context for each allocated DAI.
121 * @status_update_lock: protect concurrency between interrupt-based and delayed work
/linux/arch/microblaze/kernel/
H A Dexceptions.c4 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
13 * This file handles the architecture-dependent parts of hardware exceptions
48 * context so we don't handle it here in die()
56 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->r16); in sw_exception()
57 flush_dcache_range(regs->r16, regs->r16 + 0x4); in sw_exception()
58 flush_icache_range(regs->r16, regs->r16 + 0x4); in sw_exception()
72 addr = regs->pc; in full_exception()
77 (unsigned int) regs->pc, (unsigned int) regs->esr); in full_exception()
/linux/arch/powerpc/kernel/
H A Dcpu_setup_6xx.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
13 #include <asm/asm-offsets.h>
16 #include <asm/feature-fixups.h>
100 bne 1f /* don't invalidate the D-cache */
341 /* Called in normal context to backup CPU 0 state. This
359 /* Now deal with CPU type dependent registers */
410 /* Called with no MMU context (typically MSR:IR/DR off) to
419 lis r5,(cpu_state_storage-KERNELBASE)@h
430 /* Now deal with CPU type dependent registers */
/linux/Documentation/scheduler/
H A Dcompletion.rst2 Completions - "wait for completion" barrier APIs
6 -------------
10 race-free solution to this problem. Semantically they are somewhat like a
11 pthread_barrier() and have similar use-cases.
14 misuse of locks/semaphores and busy-loops. Any time you think of using
34 ------
38 - the initialization of the 'struct completion' synchronization object
39 - the waiting part through a call to one of the variants of wait_for_completion(),
40 - the signaling side through a call to complete() or complete_all().
57 This provides the ->wait waitqueue to place tasks on for waiting (if any), and
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/linux/drivers/clk/samsung/
H A Dclk-exynos5-subcmu.c1 // SPDX-License-Identifier: GPL-2.0
5 // Common Clock Framework support for Exynos5 power-domain dependent clocks
14 #include "clk-exynos5-subcmu.h"
24 for (; num_regs > 0; --num_regs, ++rd) { in exynos5_subcmu_clk_save()
25 rd->save = readl(base + rd->offset); in exynos5_subcmu_clk_save()
26 writel((rd->save & ~rd->mask) | rd->value, base + rd->offset); in exynos5_subcmu_clk_save()
27 rd->save &= rd->mask; in exynos5_subcmu_clk_save()
35 for (; num_regs > 0; --num_regs, ++rd) in exynos5_subcmu_clk_restore()
36 writel((readl(base + rd->offset) & ~rd->mask) | rd->save, in exynos5_subcmu_clk_restore()
37 base + rd->offset); in exynos5_subcmu_clk_restore()
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/linux/Documentation/core-api/
H A Dworkqueue.rst13 There are many cases where an asynchronous process execution context
17 When such an asynchronous execution context is needed, a work item
19 independent thread serves as the asynchronous execution context. The
33 thread system-wide. A single MT wq needed to keep around the same
42 worker pool. An MT wq could provide only one execution context per CPU
45 including proneness to deadlocks around the single execution context.
60 * Use per-CPU unified worker pools shared by all wq to provide
80 A work item can be executed in either a thread or the BH (softirq) context.
85 worker-pools.
87 The cmwq design differentiates between the user-facing workqueues that
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