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/linux/Documentation/ABI/testing/
H A Dsysfs-bus-event_source-devices-iommu7 perf_event_attr.config1 or perf_event_attr.config2 for
12 perf_event_attr.config, perf_event_attr.config1,
20 filter_requester_en = "config1:0" - Enable Requester ID filter
21 filter_domain_en = "config1:1" - Enable Domain ID filter
22 filter_pasid_en = "config1:2" - Enable PASID filter
23 filter_ats_en = "config1:3" - Enable Address Type filter
24 filter_page_table_en= "config1:4" - Enable Page Table Level filter
25 filter_requester_id = "config1:16-31" - Requester ID filter
26 filter_domain = "config1:32-47" - Domain ID filter
H A Dsysfs-bus-event_source-devices-dsa7 perf_event_attr.config1 for the IDXD DSA pmu. (See also
11 perf_event_attr.config or perf_event_attr.config1.
18 filter_wq = "config1:0-31" - workqueue filter
19 filter_tc = "config1:32-39" - traffic class filter
20 filter_pgsz = "config1:40-43" - page size filter
21 filter_sz = "config1:44-51" - transfer size filter
22 filter_eng = "config1:52-59" - engine filter
H A Dsysfs-bus-event_source-devices-format19 Example: 'config1:1,6-10,44'
21 perf_event_attr::config1.
/linux/drivers/phy/socionext/
H A Dphy-uniphier-usb2.c36 struct uniphier_u2phy_param config1; member
77 regmap_write(priv->regmap, priv->data->config1.offset, in uniphier_u2phy_init()
78 priv->data->config1.value); in uniphier_u2phy_init()
187 .config1 = { SG_USBPHY12PLL, 0x00010010 },
191 .config1 = { SG_USBPHY12PLL, 0x00010010 },
195 .config1 = { SG_USBPHY34PLL, 0x00010010 },
199 .config1 = { SG_USBPHY34PLL, 0x00010010 },
207 .config1 = { SG_USBPHY1CTRL2, 0x00000106 },
211 .config1 = { SG_USBPHY2CTRL2, 0x00000106 },
215 .config1 = { SG_USBPHY3CTRL2, 0x00000106 },
H A Dphy-uniphier-usb3hs.c82 u32 config1; member
255 u32 config0, config1; in uniphier_u3hsphy_init() local
275 || (!priv->data->config0 && !priv->data->config1)) in uniphier_u3hsphy_init()
279 config1 = priv->data->config1; in uniphier_u3hsphy_init()
286 writel(config1, priv->base + HSPHY_CFG1); in uniphier_u3hsphy_init()
418 .config1 = 0x00000106,
430 .config1 = 0x00000106,
/linux/arch/powerpc/platforms/83xx/
H A Dsuspend.c62 u32 config1; member
123 u32 reg_cfg1 = in_be32(&pmc_regs->config1); in mpc83xx_change_state()
133 out_be32(&pmc_regs->config1, reg_cfg1); in mpc83xx_change_state()
185 out_be32(&pmc_regs->config1, in mpc83xx_suspend_enter()
186 in_be32(&pmc_regs->config1) | PMCCR1_PME_EN); in mpc83xx_suspend_enter()
206 out_be32(&pmc_regs->config1, in mpc83xx_suspend_enter()
207 in_be32(&pmc_regs->config1) | PMCCR1_POWER_OFF); in mpc83xx_suspend_enter()
214 out_be32(&pmc_regs->config1, in mpc83xx_suspend_enter()
215 in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF); in mpc83xx_suspend_enter()
229 out_be32(&pmc_regs->config1, in mpc83xx_suspend_enter()
[all …]
/linux/tools/testing/selftests/powerpc/pmu/event_code_tests/
H A Dgroup_constraint_thresh_cmp_test.c43 /* Add the thresh_cmp value for leader in config1 */ in group_constraint_thresh_cmp()
44 leader.attr.config1 = 1000; in group_constraint_thresh_cmp()
49 /* Add the different thresh_cmp value from the leader event in config1 */ in group_constraint_thresh_cmp()
50 event.attr.config1 = 2000; in group_constraint_thresh_cmp()
60 /* Add the same thresh_cmp value for leader and sibling event in config1 */ in group_constraint_thresh_cmp()
61 event.attr.config1 = 1000; in group_constraint_thresh_cmp()
/linux/drivers/staging/iio/addac/
H A Dadt7316.c89 * ADT7316 config1
184 u8 config1; member
219 return sprintf(buf, "%d\n", !!(chip->config1 & ADT7316_EN)); in adt7316_show_enabled()
225 u8 config1; in _adt7316_store_enabled() local
229 config1 = chip->config1 | ADT7316_EN; in _adt7316_store_enabled()
231 config1 = chip->config1 & ~ADT7316_EN; in _adt7316_store_enabled()
233 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG1, config1); in _adt7316_store_enabled()
237 chip->config1 = config1; in _adt7316_store_enabled()
277 return sprintf(buf, "%d\n", !!(chip->config1 & ADT7516_SEL_EX_TEMP)); in adt7316_show_select_ex_temp()
287 u8 config1; in adt7316_store_select_ex_temp() local
[all …]
/linux/drivers/perf/hisilicon/
H A Dhisi_uncore_pa_pmu.c49 HISI_PMU_EVENT_ATTR_EXTRACTOR(tgtid_cmd, config1, 10, 0);
50 HISI_PMU_EVENT_ATTR_EXTRACTOR(tgtid_msk, config1, 21, 11);
51 HISI_PMU_EVENT_ATTR_EXTRACTOR(srcid_cmd, config1, 32, 22);
52 HISI_PMU_EVENT_ATTR_EXTRACTOR(srcid_msk, config1, 43, 33);
53 HISI_PMU_EVENT_ATTR_EXTRACTOR(tracetag_en, config1, 44, 44);
135 if (event->attr.config1 != 0x0) { in hisi_pa_pmu_enable_filter()
144 if (event->attr.config1 != 0x0) { in hisi_pa_pmu_disable_filter()
305 HISI_PMU_FORMAT_ATTR(tgtid_cmd, "config1:0-10"),
306 HISI_PMU_FORMAT_ATTR(tgtid_msk, "config1:11-21"),
307 HISI_PMU_FORMAT_ATTR(srcid_cmd, "config1:22-32"),
[all …]
H A Dhisi_uncore_sllc_pmu.c64 HISI_PMU_EVENT_ATTR_EXTRACTOR(tgtid_min, config1, 10, 0);
65 HISI_PMU_EVENT_ATTR_EXTRACTOR(tgtid_max, config1, 21, 11);
66 HISI_PMU_EVENT_ATTR_EXTRACTOR(srcid_cmd, config1, 32, 22);
67 HISI_PMU_EVENT_ATTR_EXTRACTOR(srcid_msk, config1, 43, 33);
68 HISI_PMU_EVENT_ATTR_EXTRACTOR(tracetag_en, config1, 44, 44);
198 if (event->attr.config1 != 0x0) { in hisi_sllc_pmu_enable_filter()
207 if (event->attr.config1 != 0x0) { in hisi_sllc_pmu_clear_filter()
369 HISI_PMU_FORMAT_ATTR(tgtid_min, "config1:0-10"),
370 HISI_PMU_FORMAT_ATTR(tgtid_max, "config1:11-21"),
371 HISI_PMU_FORMAT_ATTR(srcid_cmd, "config1:22-32"),
[all …]
H A Dhisi_uncore_hha_pmu.c54 HISI_PMU_EVENT_ATTR_EXTRACTOR(srcid_cmd, config1, 10, 0);
55 HISI_PMU_EVENT_ATTR_EXTRACTOR(srcid_msk, config1, 21, 11);
56 HISI_PMU_EVENT_ATTR_EXTRACTOR(tracetag_en, config1, 22, 22);
57 HISI_PMU_EVENT_ATTR_EXTRACTOR(datasrc_skt, config1, 23, 23);
143 if (event->attr.config1 != 0x0) { in hisi_hha_pmu_enable_filter()
152 if (event->attr.config1 != 0x0) { in hisi_hha_pmu_disable_filter()
347 HISI_PMU_FORMAT_ATTR(srcid_cmd, "config1:0-10"),
348 HISI_PMU_FORMAT_ATTR(srcid_msk, "config1:11-21"),
349 HISI_PMU_FORMAT_ATTR(tracetag_en, "config1:22"),
350 HISI_PMU_FORMAT_ATTR(datasrc_skt, "config1:23"),
H A Dhisi_uncore_l3c_pmu.c61 * Remain the config1:0-7 for backward compatibility if some existing users
62 * hardcode the config1:0-7 directly without parsing the sysfs attribute.
64 HISI_PMU_EVENT_ATTR_EXTRACTOR(tt_core_deprecated, config1, 7, 0);
65 HISI_PMU_EVENT_ATTR_EXTRACTOR(tt_req, config1, 10, 8);
66 HISI_PMU_EVENT_ATTR_EXTRACTOR(datasrc_cfg, config1, 15, 11);
67 HISI_PMU_EVENT_ATTR_EXTRACTOR(datasrc_skt, config1, 16, 16);
105 * config1:0-7 to config2:0-*. Try it first and fallback to tt_core_deprecated
628 HISI_PMU_FORMAT_ATTR(tt_core_deprecated, "config1:0-7"),
629 HISI_PMU_FORMAT_ATTR(tt_req, "config1:8-10"),
630 HISI_PMU_FORMAT_ATTR(datasrc_cfg, "config1:11-15"),
[all …]
H A Dhisi_pcie_pmu.c94 HISI_PCIE_PMU_FILTER_ATTR(thr_len, config1, 3, 0);
95 HISI_PCIE_PMU_FILTER_ATTR(thr_mode, config1, 4, 4);
96 HISI_PCIE_PMU_FILTER_ATTR(trig_len, config1, 8, 5);
97 HISI_PCIE_PMU_FILTER_ATTR(trig_mode, config1, 9, 9);
98 HISI_PCIE_PMU_FILTER_ATTR(len_mode, config1, 11, 10);
765 HISI_PCIE_PMU_FORMAT_ATTR(thr_len, "config1:0-3"),
766 HISI_PCIE_PMU_FORMAT_ATTR(thr_mode, "config1:4"),
767 HISI_PCIE_PMU_FORMAT_ATTR(trig_len, "config1:5-8"),
768 HISI_PCIE_PMU_FORMAT_ATTR(trig_mode, "config1:9"),
769 HISI_PCIE_PMU_FORMAT_ATTR(len_mode, "config1:10-11"),
/linux/drivers/iommu/intel/
H A Dperfmon.c77 IOMMU_PMU_ATTR(filter_requester_id_en, "config1:0", IOMMU_PMU_FILTER_REQUESTER_ID);
78 IOMMU_PMU_ATTR(filter_domain_en, "config1:1", IOMMU_PMU_FILTER_DOMAIN);
79 IOMMU_PMU_ATTR(filter_pasid_en, "config1:2", IOMMU_PMU_FILTER_PASID);
80 IOMMU_PMU_ATTR(filter_ats_en, "config1:3", IOMMU_PMU_FILTER_ATS);
81 IOMMU_PMU_ATTR(filter_page_table_en, "config1:4", IOMMU_PMU_FILTER_PAGE_TABLE);
82 IOMMU_PMU_ATTR(filter_requester_id, "config1:16-31", IOMMU_PMU_FILTER_REQUESTER_ID);
83 IOMMU_PMU_ATTR(filter_domain, "config1:32-47", IOMMU_PMU_FILTER_DOMAIN);
416 iommu_pmu_set_filter(requester_id, event->attr.config1, in iommu_pmu_assign_event()
418 event->attr.config1); in iommu_pmu_assign_event()
419 iommu_pmu_set_filter(domain, event->attr.config1, in iommu_pmu_assign_event()
[all …]
/linux/Documentation/admin-guide/perf/
H A Dxgene-pmu.rst19 config1 (agent ID) fields of the perf_event_attr structure. The "events"
30 to a corresponding bit in "config1" field. By default, the event will be
31 counted for all agent requests (config1 = 0x0). For all the supported agents of
46 / # perf stat -a -e l3c0/read-miss,config1=0xfffffffffffffffe/ sleep 1
/linux/drivers/gpu/drm/vc4/
H A Dvc4_vec.c244 u32 config1; member
280 .config1 = VEC_CONFIG1_C_CVBS_CVBS,
286 .config1 = VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ,
293 .config1 = VEC_CONFIG1_C_CVBS_CVBS,
299 .config1 = VEC_CONFIG1_C_CVBS_CVBS,
306 .config1 = VEC_CONFIG1_C_CVBS_CVBS | VEC_CONFIG1_CUSTOM_FREQ,
313 .config1 = VEC_CONFIG1_C_CVBS_CVBS,
319 .config1 = VEC_CONFIG1_C_CVBS_CVBS,
325 .config1 = VEC_CONFIG1_C_CVBS_CVBS,
334 .config1 = VEC_CONFIG1_C_CVBS_CVBS,
[all …]
/linux/drivers/net/ethernet/seeq/
H A Dether3.c119 ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1); in ether3_setbuffer()
273 priv(dev)->regs.config1 = CFG1_RECVCOMPSTAT0|CFG1_DMABURST8; in ether3_init_2()
280 ether3_outw(priv(dev)->regs.config1 | CFG1_BUFSELSTAT0, REG_CONFIG1); in ether3_init_2()
285 priv(dev)->regs.config1 |= CFG1_RECVPROMISC; in ether3_init_2()
287 priv(dev)->regs.config1 |= CFG1_RECVSPECBRMULTI; in ether3_init_2()
289 priv(dev)->regs.config1 |= CFG1_RECVSPECBROAD; in ether3_init_2()
296 ether3_outw(priv(dev)->regs.config1 | CFG1_TRANSEND, REG_CONFIG1); in ether3_init_2()
302 ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1); in ether3_init_2()
331 ether3_outw(priv(dev)->regs.config1 | CFG1_BUFSELSTAT0, REG_CONFIG1); in ether3_init_for_open()
340 ether3_outw(priv(dev)->regs.config1 | CFG1_TRANSEND, REG_CONFIG1); in ether3_init_for_open()
[all …]
/linux/drivers/mtd/nand/raw/
H A Dmxc_nand.c146 * (CONFIG1:INT_MSK is set). To handle this the driver uses
147 * enable_irq/disable_irq_nosync instead of CONFIG1:INT_MSK
674 uint16_t config1; in mxc_nand_enable_hwecc_v1_v2() local
679 config1 = readw(NFC_V1_V2_CONFIG1); in mxc_nand_enable_hwecc_v1_v2()
682 config1 |= NFC_V1_V2_CONFIG1_ECC_EN; in mxc_nand_enable_hwecc_v1_v2()
684 config1 &= ~NFC_V1_V2_CONFIG1_ECC_EN; in mxc_nand_enable_hwecc_v1_v2()
686 writew(config1, NFC_V1_V2_CONFIG1); in mxc_nand_enable_hwecc_v1_v2()
1001 uint16_t config1 = 0; in preset_v1() local
1005 config1 |= NFC_V1_V2_CONFIG1_ECC_EN; in preset_v1()
1008 config1 |= NFC_V1_V2_CONFIG1_INT_MSK; in preset_v1()
[all …]
/linux/arch/mips/mm/
H A Dc-octeon.c174 unsigned int config1; in probe_octeon() local
178 config1 = read_c0_config1(); in probe_octeon()
182 c->icache.linesz = 2 << ((config1 >> 19) & 7); in probe_octeon()
183 c->icache.sets = 64 << ((config1 >> 22) & 7); in probe_octeon()
184 c->icache.ways = 1 + ((config1 >> 16) & 7); in probe_octeon()
202 c->icache.linesz = 2 << ((config1 >> 19) & 7); in probe_octeon()
H A Dc-r4k.c1000 unsigned long config1; in probe_pcache() local
1123 config1 = read_c0_config1(); in probe_pcache()
1124 lsize = (config1 >> 19) & 7; in probe_pcache()
1129 c->icache.sets = 64 << ((config1 >> 22) & 7); in probe_pcache()
1130 c->icache.ways = 1 + ((config1 >> 16) & 7); in probe_pcache()
1136 lsize = (config1 >> 10) & 7; in probe_pcache()
1141 c->dcache.sets = 64 << ((config1 >> 13) & 7); in probe_pcache()
1142 c->dcache.ways = 1 + ((config1 >> 7) & 7); in probe_pcache()
1176 config1 = read_c0_config1(); in probe_pcache()
1178 lsize = (config1 >> 19) & 7; in probe_pcache()
[all …]
/linux/arch/mips/cavium-octeon/executive/
H A Dcvmx-pko.c297 union cvmx_pko_reg_queue_ptrs1 config1; in cvmx_pko_shutdown() local
298 config1.u64 = 0; in cvmx_pko_shutdown()
299 config1.s.qid7 = queue >> 7; in cvmx_pko_shutdown()
300 cvmx_write_csr(CVMX_PKO_REG_QUEUE_PTRS1, config1.u64); in cvmx_pko_shutdown()
333 union cvmx_pko_reg_queue_ptrs1 config1; in cvmx_pko_config_port() local
425 config1.u64 = 0; in cvmx_pko_config_port()
426 config1.s.idx3 = queue >> 3; in cvmx_pko_config_port()
427 config1.s.qid7 = (base_queue + queue) >> 7; in cvmx_pko_config_port()
529 cvmx_write_csr(CVMX_PKO_REG_QUEUE_PTRS1, config1.u64); in cvmx_pko_config_port()
/linux/drivers/dma/idxd/
H A Dperfmon.c17 * These attributes specify the bits in the config1 word that the perf
20 DEFINE_PERFMON_FORMAT_ATTR(filter_wq, "config1:0-31");
21 DEFINE_PERFMON_FORMAT_ATTR(filter_tc, "config1:32-39");
22 DEFINE_PERFMON_FORMAT_ATTR(filter_pgsz, "config1:40-43");
23 DEFINE_PERFMON_FORMAT_ATTR(filter_sz, "config1:44-51");
24 DEFINE_PERFMON_FORMAT_ATTR(filter_eng, "config1:52-59");
306 flt_cfg.val = event->attr.config1; in perfmon_pmu_event_start()
/linux/arch/x86/events/intel/
H A Duncore_snbep.c501 DEFINE_UNCORE_FORMAT_ATTR(filter_tid, filter_tid, "config1:0-4");
502 DEFINE_UNCORE_FORMAT_ATTR(filter_tid2, filter_tid, "config1:0");
503 DEFINE_UNCORE_FORMAT_ATTR(filter_tid3, filter_tid, "config1:0-5");
504 DEFINE_UNCORE_FORMAT_ATTR(filter_tid4, filter_tid, "config1:0-8");
505 DEFINE_UNCORE_FORMAT_ATTR(filter_tid5, filter_tid, "config1:0-9");
506 DEFINE_UNCORE_FORMAT_ATTR(filter_cid, filter_cid, "config1:5");
507 DEFINE_UNCORE_FORMAT_ATTR(filter_link, filter_link, "config1:5-8");
508 DEFINE_UNCORE_FORMAT_ATTR(filter_link2, filter_link, "config1:6-8");
509 DEFINE_UNCORE_FORMAT_ATTR(filter_link3, filter_link, "config1:12");
510 DEFINE_UNCORE_FORMAT_ATTR(filter_nid, filter_nid, "config1:10-17");
[all …]
/linux/arch/mips/kernel/
H A Dcpu-probe.c464 unsigned int config1; in decode_config1() local
466 config1 = read_c0_config1(); in decode_config1()
468 if (config1 & MIPS_CONF1_MD) in decode_config1()
470 if (config1 & MIPS_CONF1_PC) in decode_config1()
472 if (config1 & MIPS_CONF1_WR) in decode_config1()
474 if (config1 & MIPS_CONF1_CA) in decode_config1()
476 if (config1 & MIPS_CONF1_EP) in decode_config1()
478 if (config1 & MIPS_CONF1_FP) { in decode_config1()
483 c->tlbsize = ((config1 & MIPS_CONF1_TLBS) >> 25) + 1; in decode_config1()
488 return config1 & MIPS_CONF_M; in decode_config1()
[all …]
/linux/drivers/hwmon/
H A Dadm1026.c286 u8 config1; /* Register value */ member
434 /* Read various values from CONFIG1 */ in adm1026_update_device()
435 data->config1 = adm1026_read_value(client, in adm1026_update_device()
437 if (data->config1 & CFG1_PWM_AFC) { in adm1026_update_device()
974 return sprintf(buf, "%d\n", (data->config1 & CFG1_THERM_HOT) >> 4); in show_temp_crit_enable()
992 data->config1 = (data->config1 & ~CFG1_THERM_HOT) | (val << 4); in set_temp_crit_enable()
993 adm1026_write_value(client, ADM1026_REG_CONFIG1, data->config1); in set_temp_crit_enable()
1358 data->config1 = (data->config1 & ~CFG1_PWM_AFC) in pwm1_enable_store()
1360 adm1026_write_value(client, ADM1026_REG_CONFIG1, data->config1); in pwm1_enable_store()
1726 data->config1 = adm1026_read_value(client, ADM1026_REG_CONFIG1); in adm1026_init_client()
[all …]

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