Home
last modified time | relevance | path

Searched +full:compute +full:- (Results 1 – 25 of 1016) sorted by relevance

12345678910>>...41

/linux/scripts/coccinelle/misc/
H A Darray_size_dup.cocci1 // SPDX-License-Identifier: GPL-2.0-only
5 /// 1. An opencoded expression is used before array_size() to compute the same size
6 /// 2. An opencoded expression is used after array_size() to compute the same size
13 // Options: --no-includes --include-headers --no-loops
43 msg = "WARNING: array_size is used later (line %s) to compute the same size" % (p2[0].line)
51 msg = "WARNING: array_size is used later (line %s) to compute the same size" % (p2[0].line)
72 msg = "WARNING: array_size is already used (line %s) to compute the same size" % (p1[0].line)
80 msg = "WARNING: array_size is already used (line %s) to compute the same size" % (p1[0].line)
108 msg = "WARNING: array3_size is used later (line %s) to compute the same size" % (p2[0].line)
116 msg = "WARNING: array3_size is used later (line %s) to compute the same size" % (p2[0].line)
[all …]
/linux/Documentation/devicetree/bindings/misc/
H A Dqcom,fastrpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 The FastRPC implements an IPC (Inter-Processor Communication)
25 - adsp
26 - mdsp
27 - sdsp
28 - cdsp
29 - cdsp1
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z16/
H A Dpai_crypto.json3 "Unit": "PAI-CRYPTO",
10 "Unit": "PAI-CRYPTO",
14 "PublicDescription": "KM-DEA function ending with CC=0"
17 "Unit": "PAI-CRYPTO",
21 "PublicDescription": "KM-TDEA-128 function ending with CC=0"
24 "Unit": "PAI-CRYPTO",
28 "PublicDescription": "KM-TDEA-192 function ending with CC=0"
31 "Unit": "PAI-CRYPTO",
35 "PublicDescription": "KM-Encrypted-DEA function ending with CC=0"
38 "Unit": "PAI-CRYPTO",
[all …]
/linux/Documentation/gpu/amdgpu/
H A Ddriver-core.rst32 This was a dedicated IP on older pre-vega chips, but has since
58 It is described in more details in :ref:`Display Core <amdgpu-display-core>`.
61 This is a multi-purpose DMA engine. The kernel driver uses it for
66 GC (Graphics and Compute)
67 This is the graphics and compute engine, i.e., the block that
69 largest block on the GPU. The 3D pipeline has tons of sub-blocks. In
75 This is the multi-media engine. It handles video and image encode and
76 decode. It's exposed to userspace for user mode drivers (VA-API,
79 Graphics and Compute Microcontrollers
80 -------------------------------------
[all …]
H A Damdgpu-glossary.rst7 'Documentation/gpu/amdgpu/display/dc-glossary.rst'.
22 Compute Unit
43 Graphics and Compute
75 Kernel Compute Queue
84 MicroEngine Compute
90 Multi-Media HUB
96 PowerPlay Library - PowerPlay is the power management component.
/linux/drivers/gpu/drm/xe/
H A Dxe_gt_ccs_mode.c1 // SPDX-License-Identifier: MIT
32 * For example, if there are four compute slices available, the in __xe_gt_apply_ccs_mode()
33 * assignment of compute slices to compute engines would be, in __xe_gt_apply_ccs_mode()
48 for (width = num_slices / num_engines; width; width--) { in __xe_gt_apply_ccs_mode()
53 if (hwe->class != XE_ENGINE_CLASS_COMPUTE) in __xe_gt_apply_ccs_mode()
56 if (hwe->logical_instance >= num_engines) in __xe_gt_apply_ccs_mode()
59 config |= BIT(hwe->instance) << XE_HW_ENGINE_CCS0; in __xe_gt_apply_ccs_mode()
66 mode |= CCS_MODE_CSLICE(cslice, hwe->instance); in __xe_gt_apply_ccs_mode()
77 xe_mmio_write32(&gt->mmio, CCS_MODE, mode); in __xe_gt_apply_ccs_mode()
85 if (!gt->ccs_mode || IS_SRIOV_VF(gt_to_xe(gt))) in xe_gt_apply_ccs_mode()
[all …]
H A Dxe_vm_doc.h1 /* SPDX-License-Identifier: MIT */
19 * ------------
33 * ----------
35 * DRM_XE_VM_BIND_OP_MAP - Create mapping for a BO
36 * DRM_XE_VM_BIND_OP_UNMAP - Destroy mapping for a BO / userptr
37 * DRM_XE_VM_BIND_OP_MAP_USERPTR - Create mapping for userptr
54 * .. code-block::
56 * bind BO0 0x0-0x1000
62 * bind BO1 0x201000-0x202000
66 * bind BO2 0x1ff000-0x201000
[all …]
H A Dxe_gt_types.h1 /* SPDX-License-Identifier: MIT */
3 * Copyright © 2022-2023 Intel Corporation
61 * need to explicitly re-steer reads of registers of the other type.
63 * Only the replication types that may need additional non-default steering
76 * will always return a non-terminated value at instance (0, 0). We'll
83 * it's sufficient to keep the HW-default for the selector, or only
93 const struct xe_gt * : (const struct xe_tile *)((gt__)->tile), \
94 struct xe_gt * : (gt__)->tile)
98 const struct xe_gt * : (const struct xe_device *)(gt_to_tile(gt__)->xe), \
99 struct xe_gt * : gt_to_tile(gt__)->xe)
[all …]
/linux/Documentation/gpu/
H A Ddrm-compute.rst2 Long running workloads and compute
5 Long running workloads (compute) are workloads that will not complete in 10
10 Some hardware may schedule compute jobs, and have no way to pre-empt them, or
14 This means that it differs from what is described in driver-api/dma-buf.rst.
16 As with normal compute jobs, dma-fence may not be used at all. In this case,
18 from the long compute job's address space on unbind immediately, not even
26 The first approach you will likely try is to pin all buffers used by compute.
34 older compute jobs to start a new one.
41 driver-allocated CPU memory would be accounted to the correct cgroup, and
/linux/drivers/accel/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Compute Acceleration device configuration
5 # This framework provides support for compute acceleration devices, such
6 # as, but not limited to, Machine-Learning and Deep-Learning acceleration
12 bool "Compute Acceleration Framework"
14 Framework for device drivers of compute acceleration devices, such
15 as, but not limited to, Machine-Learning and Deep-Learning
19 This framework is integrated with the DRM subsystem as compute
23 major number than GPUs, and will be exposed to user-space using
/linux/drivers/iio/common/inv_sensors/
H A Dinv_sensors_timestamp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 /* compute jitter, min and max following jitter in per mille */
17 (((_val) * (1000 - (_jitter))) / 1000)
27 acc->values[acc->idx++] = val; in inv_update_acc()
28 if (acc->idx >= ARRAY_SIZE(acc->values)) in inv_update_acc()
29 acc->idx = 0; in inv_update_acc()
31 /* compute the mean of all stored values, use 0 as empty slot */ in inv_update_acc()
32 for (i = 0; i < ARRAY_SIZE(acc->values); ++i) { in inv_update_acc()
33 if (acc->values[i] == 0) in inv_update_acc()
35 sum += acc->values[i]; in inv_update_acc()
[all …]
/linux/Documentation/driver-api/
H A Ddma-buf.rst1 Buffer Sharing and Synchronization (dma-buf)
4 The dma-buf subsystem provides the framework for sharing buffers for
14 interact with the three main primitives offered by dma-buf:
16 - dma-buf, representing a sg_table and exposed to userspace as a file
19 - dma-fence, providing a mechanism to signal when an asynchronous
21 - dma-resv, which manages a set of dma-fences for a particular dma-buf
22 allowing implicit (kernel-ordered) synchronization of work to
27 --------------------------------
29 For more details on how to design your subsystem's API for dma-buf use, please
30 see Documentation/userspace-api/dma-buf-alloc-exchange.rst.
[all …]
/linux/arch/x86/events/amd/
H A Dpower.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Performance events - AMD Processor Power Reporting Mechanism
16 /* Event code: LSB 8 bits, passed in attr->config any other bit is reserved. */
25 * The ratio of compute unit power accumulator sample period to the
30 /* Maximum accumulated power of a compute unit. */
36 * Accumulated power represents the sum of each compute unit's (CU) power
45 struct hw_perf_event *hwc = &event->hw; in event_update()
49 prev_pwr_acc = hwc->pwr_acc; in event_update()
50 prev_ptsc = hwc->ptsc; in event_update()
56 * final value (delta) is micro-Watts. Then add it to the event count. in event_update()
[all …]
/linux/tools/testing/selftests/bpf/
H A Dnetwork_helpers.h1 /* SPDX-License-Identifier: GPL-2.0 */
29 /* +ve: Passed to listen() as-is.
33 * Most tests only have one on-going connection.
34 * -ve: It is changed to 0 before passing to listen().
90 * open_netns() - Switch to specified network namespace by name.
126 iph->check = 0; in build_ip_csum()
128 sum = csum_partial(p, iph->ihl << 2, 0); in build_ip_csum()
134 * csum_tcpudp_magic - compute IP pseudo-header checksum
136 * Compute the IPv4 pseudo header checksum. The helper can take a
164 * csum_ipv6_magic - compute IPv6 pseudo-header checksum
[all …]
/linux/Documentation/hwmon/
H A Dfam15h_power.rst16 - BIOS and Kernel Developer's Guide (BKDG) For AMD Family 15h Processors
17 - BIOS and Kernel Developer's Guide (BKDG) For AMD Family 16h Processors
18 - AMD64 Architecture Programmer's Manual Volume 2: System Programming
23 -----------
55 On multi-node processors the calculated value is for the entire
57 attributes only for internal node0 of a multi-node processor.
67 compute unit power accumulator sample period
76 the ratio of compute unit power accumulator sample period to the
80 max compute unit accumulated power which is indicated by
84 compute unit accumulated power which is indicated by
[all …]
/linux/lib/
H A Dsiphash.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 /* Copyright (C) 2016-2022 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
4 * SipHash: a fast short-input PRF
7 * This implementation is specifically for SipHash2-4 for a secure PRF
8 * and HalfSipHash1-3/SipHash1-3 for an insecure PRF only suitable for
17 #include <asm/word-at-a-time.h>
28 v3 ^= key->key[1]; \
29 v2 ^= key->key[0]; \
30 v1 ^= key->key[1]; \
31 v0 ^= key->key[0];
[all …]
H A Dbch.c15 * Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
24 * Bose-Chaudhuri-Hocquenghem (BCH) codes.
30 * Call bch_encode to compute and store ecc parity bytes to a given buffer.
50 * b. Error locator polynomial computation using Berlekamp-Massey algorithm
56 * (BTA) down to a certain degree (4), after which ad hoc low-degree polynomial
63 * - WEWoRC 2009, Graz, Austria, LNCS, Springer, July 2009, to appear.
81 #define GF_N(_p) ((1 << (CONFIG_BCH_CONST_M))-1)
85 #define GF_M(_p) ((_p)->m)
86 #define GF_T(_p) ((_p)->t)
87 #define GF_N(_p) ((_p)->n)
[all …]
/linux/tools/perf/Documentation/
H A Dperf-diff.txt1 perf-diff(1)
5 ----
6 perf-diff - Read perf.data files and display the differential profile
9 --------
14 -----------
29 -------
30 -D::
31 --dump-raw-trace::
34 --kallsyms=<file>::
37 -m::
[all …]
/linux/Documentation/devicetree/bindings/arm/bcm/
H A Dbcm2835.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eric Anholt <eric@anholt.net>
11 - Stefan Wahren <wahrenst@gmx.net>
18 - description: BCM2711 based Boards
20 - enum:
21 - raspberrypi,400
22 - raspberrypi,4-compute-module
23 - raspberrypi,4-model-b
[all …]
/linux/drivers/hwmon/
H A Dfam15h_power.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * fam15h_power.c - AMD Family 15h processor power monitoring
5 * Copyright (c) 2011-2016 Advanced Micro Devices, Inc.
11 #include <linux/hwmon-sysfs.h>
55 /* maximum accumulated power of a compute unit */
57 /* accumulated power of the compute units */
61 /* online/offline status of current compute unit */
78 struct pci_dev *f4 = data->pdev; in power1_input_show()
80 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5), in power1_input_show()
97 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5), in power1_input_show()
[all …]
/linux/fs/xfs/libxfs/
H A Dxfs_rtbitmap.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2000-2005 Silicon Graphics, Inc.
37 struct xfs_mount *mp = bp->b_mount; in xfs_rtbuf_verify()
38 struct xfs_rtbuf_blkinfo *hdr = bp->b_addr; in xfs_rtbuf_verify()
40 if (!xfs_verify_magic(bp, hdr->rt_magic)) in xfs_rtbuf_verify()
46 if (!uuid_equal(&hdr->rt_uuid, &mp->m_sb.sb_meta_uuid)) in xfs_rtbuf_verify()
48 if (hdr->rt_blkno != cpu_to_be64(xfs_buf_daddr(bp))) in xfs_rtbuf_verify()
57 struct xfs_mount *mp = bp->b_mount; in xfs_rtbuf_verify_read()
58 struct xfs_rtbuf_blkinfo *hdr = bp->b_addr; in xfs_rtbuf_verify_read()
64 if (!xfs_log_check_lsn(mp, be64_to_cpu(hdr->rt_lsn))) { in xfs_rtbuf_verify_read()
[all …]
/linux/arch/x86/include/asm/
H A Dchecksum_64.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Checksums for x86-64
8 * with some code from asm-x86/checksum.h
15 * csum_fold - Fold and invert a 32bit checksum.
41 * ip_fast_csum - Compute the IPv4 header checksum efficiently.
76 * csum_tcpup_nofold - Compute an IPv4 pseudo header checksum.
102 * csum_tcpup_magic - Compute an IPv4 pseudo header checksum.
120 * csum_partial - Compute an internet checksum.
139 * ip_compute_csum - Compute an 16bit IP checksum.
149 * csum_ipv6_magic - Compute checksum of an IPv6 pseudo header.
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_doorbell.h47 * For asic before vega10, doorbell is 32-bit, so the
49 * can be 64-bit, so the index defined is in qword.
121 /* Compute + GFX: 0~255 */
176 /* 8 compute rings per GC. Max to 0x1CE */
188 /* Compute + GFX: 0~255 */
244 …* All compute related doorbells: kiq, hiq, diq, traditional compute queue, user queue, should loca…
246 * Compute related doorbells are allocated from 0x00 to 0x8a
257 /* Compute engines */
277 * default non-graphics QWORD index is 0xe0 - 0xFF inclusive
328 /* Compute: 0x08 ~ 0x20 */
/linux/drivers/clk/ti/
H A Ddpll44xx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP4-specific DPLL control functions
20 * can supported when using the DPLL low-power mode. Frequencies are
22 * Status, and Low-Power Operation Mode".
45 mask = clk->flags & CLOCK_CLKOUTX2 ? in omap4_dpllmx_allow_gatectrl()
49 v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg); in omap4_dpllmx_allow_gatectrl()
52 ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg); in omap4_dpllmx_allow_gatectrl()
63 mask = clk->flags & CLOCK_CLKOUTX2 ? in omap4_dpllmx_deny_gatectrl()
67 v = ti_clk_ll_ops->clk_readl(&clk->clksel_reg); in omap4_dpllmx_deny_gatectrl()
70 ti_clk_ll_ops->clk_writel(v, &clk->clksel_reg); in omap4_dpllmx_deny_gatectrl()
[all …]
/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,rpmh.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect
10 - Georgi Djakov <georgi.djakov@linaro.org>
11 - Odelu Kukatla <quic_okukatla@quicinc.com>
27 - qcom,sc7180-aggre1-noc
28 - qcom,sc7180-aggre2-noc
29 - qcom,sc7180-camnoc-virt
30 - qcom,sc7180-compute-noc
[all …]

12345678910>>...41