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/linux/Documentation/devicetree/bindings/phy/
H A Dmarvell,comphy-cp110.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/marvell,comphy-cp110.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MVEBU COMPHY Controller
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 COMPHY controllers can be found on the following Marvell MVEBU SoCs:
15 * Armada 7k/8k (on the CP110)
24 - marvell,comphy-cp110
25 - marvell,comphy-a3700
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/linux/drivers/phy/marvell/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
28 tristate "Marvell A3700 comphy driver"
35 This driver allows to control the comphy, a hardware block providing
49 tristate "Marvell Armada 38x comphy driver"
54 This driver allows to control the comphy, an hardware block providing
59 tristate "Marvell CP110 comphy driver"
65 This driver allows to control the comphy, an hardware block providing
66 shared serdes PHYs on Marvell Armada 7k/8k (in the CP110). Its serdes
71 tristate "Marvell CP110 UTMI driver"
76 Enable this to support Marvell CP110 UTMI PHY driver.
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_ARMADA375_USBCLUSTER_PHY) += phy-armada375-usb2.o
3 obj-$(CONFIG_PHY_BERLIN_SATA) += phy-berlin-sata.o
4 obj-$(CONFIG_PHY_BERLIN_USB) += phy-berlin-usb.o
5 obj-$(CONFIG_PHY_MMP3_USB) += phy-mmp3-usb.o
6 obj-$(CONFIG_PHY_MMP3_HSIC) += phy-mmp3-hsic.o
7 obj-$(CONFIG_PHY_MVEBU_A3700_COMPHY) += phy-mvebu-a3700-comphy.o
8 obj-$(CONFIG_PHY_MVEBU_A3700_UTMI) += phy-mvebu-a3700-utmi.o
9 obj-$(CONFIG_PHY_MVEBU_A38X_COMPHY) += phy-armada38x-comphy.o
10 obj-$(CONFIG_PHY_MVEBU_CP110_COMPHY) += phy-mvebu-cp110-comphy.o
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H A Dphy-armada38x-comphy.c1 // SPDX-License-Identifier: GPL-2.0
5 * Partly derived from CP110 comphy driver by Antoine Tenart
66 struct a38x_comphy *priv = lane->priv; in a38x_set_conf()
69 if (priv->conf) { in a38x_set_conf()
70 conf = readl_relaxed(priv->conf); in a38x_set_conf()
72 conf |= BIT(lane->port); in a38x_set_conf()
74 conf &= ~BIT(lane->port); in a38x_set_conf()
75 writel(conf, priv->conf); in a38x_set_conf()
84 val = readl_relaxed(lane->base + offset) & ~mask; in a38x_comphy_set_reg()
85 writel(val | value, lane->base + offset); in a38x_comphy_set_reg()
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H A Dphy-mvebu-a3700-comphy.c1 // SPDX-License-Identifier: GPL-2.0
11 * Structure inspired from phy-mvebu-cp110-comphy.c written by Antoine Tenart.
12 * Comphy code from ARM Trusted Firmware ported by Pali Rohár <pali@kernel.org>
32 /* Comphy lane2 indirect access register offset */
41 * since the registers are 16-bit.
45 /* COMPHY registers */
184 #define COMPHY_PHY_REG(lane, reg) (((1 - (lane)) * 0x28) + ((reg) & 0x3f))
301 /*-----------------------------------------------------------*/
392 priv->lane2_phy_indirect + COMPHY_LANE2_INDIR_ADDR); in comphy_set_indirect()
393 comphy_reg_set(priv->lane2_phy_indirect + COMPHY_LANE2_INDIR_DATA, in comphy_set_indirect()
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