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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dsamsung,exynos4210-combiner.txt1 * Samsung Exynos Interrupt Combiner Controller
3 Samsung's Exynos4 architecture includes a interrupt combiner controller which
8 The interrupt combiner controller consists of multiple combiners. Up to eight
9 interrupt sources can be connected to a combiner. The combiner outputs one
13 A single node in the device tree is used to describe the interrupt combiner
14 controller module (which includes multiple combiners). A combiner in the
16 combiners. For example, a 32-bit interrupt enable/disable config register
17 can accommodate up to 4 interrupt combiners (with each combiner supporting
21 - compatible: should be "samsung,exynos4210-combiner".
22 - interrupt-controller: Identifies the node as an interrupt controller.
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H A Dsamsung,exynos4210-combiner.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/samsung,exynos4210-combiner.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC Interrupt Combiner Controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 Samsung's Exynos4 architecture includes a interrupt combiner controller which
18 The interrupt combiner controller consists of multiple combiners. Up to eight
19 interrupt sources can be connected to a combiner. The combiner outputs one
23 A single node in the device tree is used to describe the interrupt combiner
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/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos5.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <1>;
19 #size-cells = <1>;
33 compatible = "simple-bus";
34 #address-cells = <1>;
35 #size-cells = <1>;
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H A Dexynos4212.dtsi1 // SPDX-License-Identifier: GPL-2.0
23 #address-cells = <1>;
24 #size-cells = <0>;
26 cpu-map {
39 compatible = "arm,cortex-a9";
42 clock-names = "cpu";
43 operating-points-v2 = <&cpu0_opp_table>;
44 #cooling-cells = <2>; /* min followed by max */
49 compatible = "arm,cortex-a9";
52 clock-names = "cpu";
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H A Dexynos4412.dtsi1 // SPDX-License-Identifier: GPL-2.0
23 #address-cells = <1>;
24 #size-cells = <0>;
26 cpu-map {
45 compatible = "arm,cortex-a9";
48 clock-names = "cpu";
49 operating-points-v2 = <&cpu0_opp_table>;
50 #cooling-cells = <2>; /* min followed by max */
55 compatible = "arm,cortex-a9";
58 clock-names = "cpu";
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H A Dexynos4210.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
20 #include "exynos4-cpu-thermal.dtsi"
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
34 clock-name
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DMemorySanitizer.cpp1 //===- MemorySanitizer.cpp - detector of uninitialized reads --------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
16 /// poison the shadow of the malloc-ed or alloca-ed memory, load the shadow,
25 /// optimizations and a fast start-up. But this brings the major issue
29 /// component (e.g. DynamoRIO) to instrument pre-built libraries.
33 /// shadow updates (Memcheck is single-threaded so races are not a
42 /// specialized thread-local shadow for return values
48 /// values. This behavior is controlled with a flag (msan-track-origins) and is
51 /// Origins are 4-byte values created and interpreted by the runtime library.
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