Searched full:coherently (Results 1 – 11 of 11) sorted by relevance
19 OpenCAPI allows FPGA and ASIC accelerators to be coherently
23 @ We probe for the active serial port here, coherently with
54 /* Mask of CPUs which are currently definitely operating coherently */
36 * disabled coherently. E.g. a CPU can technically enumerate supported for
558 * used coherently by the cores and GIC. Our only option is to mark in gicv5_irs_init_bases()
1150 * used coherently by the cores and GIC. Our only option is to mark in gicv5_its_init_bases()
626 * In the legacy case, ensure our coherently-allocated virtio in virtio_mmio_probe()
16 and undocumented fashion, making it hard to coherently explain.
1292 MODULE_DESCRIPTION("VFIO NVGRACE GPU PF - User Level driver for NVIDIA devices with CPU coherently …
160 /* Flag that BO is shared coherently between multiple devices or CPU threads.
1248 * enabled to make sure hardware sees them coherently. in msc_buffer_relink()