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/freebsd/share/man/man9/
H A Datomic.9305 depends on support for cache coherence in the underlying architecture.
306 In general, cache coherence on the default memory type,
310 For example, cache coherence is guaranteed on write-back memory by the
315 However, on some architectures, cache coherence might not be enabled on all
317 To determine if cache coherence is enabled for a non-default memory type,
/freebsd/usr.sbin/nscd/
H A Dnscd.conf.575 the cache coherence.
96 This number should be kept low to avoid the cache coherence problems.
/freebsd/contrib/llvm-project/clang/lib/Headers/
H A Dclwbintrin.h22 /// the cache coherence domain
/freebsd/sys/contrib/device-tree/Bindings/perf/
H A Dmarvell-cn10k-tad.yaml13 The Tag-and-Data units (TADs) maintain coherence and contain CN10K
/freebsd/contrib/llvm-project/compiler-rt/lib/builtins/
H A Dclear_cache.c137 // is not required for instruction to data coherence. in __clear_cache()
147 // unification is not required for instruction to data coherence. in __clear_cache()
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A De500v1_power_isa.dtsi45 power-isa-mmc; // Memory Coherence
H A De500v2_power_isa.dtsi45 power-isa-mmc; // Memory Coherence
H A De500mc_power_isa.dtsi53 power-isa-mmc; // Memory Coherence
H A De5500_power_isa.dtsi53 power-isa-mmc; // Memory Coherence
H A De6500_power_isa.dtsi53 power-isa-mmc; // Memory Coherence
/freebsd/share/doc/smm/06.nfs/
H A Dref.t59 Christopher. A. Kent, \fICache Coherence in Distributed Systems\fR,
/freebsd/share/doc/smm/05.fastfs/
H A D6.t44 to the coherence of the paper.
/freebsd/contrib/libcbor/doc/source/
H A Ddevelopment.rst7 Consistency and coherence are one of the key characteristics of good software.
/freebsd/lib/libpmc/
H A Dpmc.atomsilvermont.3171 Events that require a cache coherence qualifier to be specified use an
H A Dpmc.core.3159 Events that require a cache coherence qualifier to be specified use an
H A Dpmc.atom.3170 Events that require a cache coherence qualifier to be specified use an
H A Dpmc.core2.3169 Events that require a cache coherence qualifier to be specified use an
/freebsd/sys/i386/i386/
H A Dpmap_base.c358 * coherence domain. in pmap_force_invalidate_cache_range()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDKernelCodeT.h517 /// - MTYPE set to support memory coherence specified in
H A DSIMemoryLegalizer.cpp2698 // GFX12 specific, scope(desired coherence domain in cache hierarchy) is in expandStore()
/freebsd/sys/cddl/contrib/opensolaris/uts/common/sys/
H A Ddtrace_impl.h274 * always be aligned to the coherence granularity -- generally 64 bytes.)
/freebsd/sys/contrib/openzfs/module/os/freebsd/zfs/
H A Dzfs_vfsops.c1202 * This can cause a loss of coherence between ARC and page cache in zfs_domount()
/freebsd/sys/riscv/riscv/
H A Dpmap.c994 * For SMP, these functions have to use IPIs for coherence.
4825 * required for data coherence. in pmap_page_set_memattr()
/freebsd/share/examples/ipfilter/
H A Dipf-howto.txt2791 I've never seen a class-C sized network with such coherence.
/freebsd/sys/kern/
H A Dvfs_vnops.c2859 * use MAP_ASYNC to trade on-disk coherence for speed. in vn_mmap()

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