Searched full:cmu_fsys1 (Results 1 – 7 of 7) sorted by relevance
99 - description: CMU_FSYS1 BUS clock (from CMU_TOP)100 - description: CMU_FSYS1 PCIE clock (from CMU_TOP)101 - description: CMU_FSYS1 UFS_CARD clock (from CMU_TOP)102 - description: CMU_FSYS1 MMC_CARD clock (from CMU_TOP)226 cmu_fsys1: clock-controller@11400000 {
181 # Clock controller node for CMU_FSYS1
234 /* CMU_FSYS1 */
314 /* CMU_FSYS1 */
1398 /* ---- CMU_FSYS1 ---------------------------------------------------------- */1400 /* Register Offset definitions for CMU_FSYS1 (0x17040000) */1434 /* List of parent clocks for Muxes in CMU_FSYS1 */
1828 /* ---- CMU_FSYS1 ---------------------------------------------------------- */1830 /* Register Offset definitions for CMU_FSYS1 (0x11400000) */1931 /* List of parent clocks for Muxes in CMU_FSYS1 */
981 /* Register Offset definitions for CMU_FSYS1 (0x16810000) */1053 /* List of parent clocks for Muxes in CMU_FSYS1 */