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/linux/sound/soc/intel/common/
H A Dsoc-acpi-intel-cml-match.c3 * soc-acpi-intel-cml-match.c - tables and support for CML ACPI enumeration.
48 .sof_tplg_filename = "sof-cml-rt1011-rt5682.tplg",
55 .sof_tplg_filename = "sof-cml-rt1011-rt5682.tplg",
62 .sof_tplg_filename = "sof-cml-rt5682-max98357a.tplg",
67 .sof_tplg_filename = "sof-cml-rt5682.tplg",
74 .sof_tplg_filename = "sof-cml-da7219-max98357a.tplg",
81 .sof_tplg_filename = "sof-cml-da7219-max98390.tplg",
86 .sof_tplg_filename = "sof-cml-es8336", /* the tplg suffix is added at run time */
287 .sof_tplg_filename = "sof-cml-rt711-rt1308-rt715.tplg",
293 .sof_tplg_filename = "sof-cml-rt711-rt1316-rt714.tplg",
[all …]
H A Dsoc-acpi-intel-cnl-match.c28 /* cnl and cml are identical */
29 .sof_tplg_filename = "sof-cml-es8336", /* the tplg suffix is added at run time */
74 .sof_tplg_filename = "sof-cml-rt711-rt1308-rt715.tplg",
80 .sof_tplg_filename = "sof-cml-rt711-rt1308-mono-rt715.tplg",
H A DMakefile7 soc-acpi-intel-cml-match.o soc-acpi-intel-icl-match.o \
/linux/Documentation/devicetree/bindings/clock/
H A Dti,lmk04832.yaml119 CML 16 mA 0x07
120 CML 24 mA 0x08
121 CML 32 mA 0x09
/linux/drivers/net/ethernet/microchip/vcap/
H A Dvcap_model_kunit.h6 /* This file is autogenerated by cml-utils 2023-02-10 11:16:00 +0100.
H A Dvcap_ag_api.h6 /* This file is autogenerated by cml-utils 2023-03-13 10:16:42 +0100.
/linux/include/linux/platform_data/x86/
H A Dsoc.h38 SOC_INTEL_IS_CPU(cml, INTEL_KABYLAKE_L);
/linux/Documentation/devicetree/bindings/pci/
H A Dnvidia,tegra20-pcie.txt60 - cml (not required for Tegra20)
299 clock-names = "pex", "afi", "pll_e", "cml";
403 clock-names = "pex", "afi", "pll_e", "cml";
499 clock-names = "pex", "afi", "pll_e", "cml";
/linux/sound/soc/intel/boards/
H A Dsof_realtek_common.c224 * keep backward compatible with cml devices in rt1011_init()
290 * keep backward compatible with cml devices in sof_rt1011_codec_conf()
H A DKconfig428 tristate "CML with RT1011 and RT5682 in I2S Mode"
H A Dsof_da7219.c336 /* overwrite the DAI link order for CML boards */ in audio_probe()
/linux/drivers/net/ethernet/microchip/sparx5/lan969x/
H A Dlan969x_regs.c7 /* This file is autogenerated by cml-utils 2024-09-30 11:48:29 +0200.
/linux/drivers/phy/broadcom/
H A Dphy-bcm-ns-usb3.c85 /* Assert CML Divider ratio to 26 */ in bcm_ns_usb3_phy_init_ns_bx()
/linux/drivers/media/platform/st/sti/bdisp/
H A Dbdisp-reg.h41 u32 cml; member
/linux/drivers/thermal/intel/
H A Dintel_pch_thermal.c30 #define PCH_THERMAL_DID_CML_H 0X06F9 /* CML-H PCH */
/linux/include/drm/intel/
H A Dpciids.h462 /* CML GT1 */
474 /* CML GT2 */
/linux/drivers/net/ethernet/chelsio/cxgb/
H A Dvsc7326_reg.h109 #define REG_SPI4_STATUS CRA(0x5,0x0,0x01) /* CML Status */
/linux/drivers/clk/tegra/
H A Dclk-tegra30.c346 /* PLLE special case: use cpcon field to store cml divider value */
1260 TEGRA_CLK_DUPLICATE(TEGRA30_CLK_CML0, "tegra_pcie", "cml"),
H A Dclk-tegra114.c520 /* PLLE special case: use cpcon field to store cml divider value */
H A Dclk-tegra124.c434 /* PLLE special case: use cpcon field to store cml divider value */
/linux/drivers/soundwire/
H A Dintel.c362 * (CNL/CML) or 38.4 MHz (ICL/TGL+). On MeteorLake additional in intel_link_power_up()
/linux/drivers/pci/controller/
H A Dpci-tegra.c1215 dev_err(dev, "failed to enable CML clock: %d\n", err); in tegra_pcie_power_on()
1273 pcie->cml_clk = devm_clk_get(dev, "cml"); in tegra_pcie_clocks_get()
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132.dtsi48 clock-names = "pex", "afi", "pll_e", "cml";
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30.dtsi53 clock-names = "pex", "afi", "pll_e", "cml";
H A Dtegra124.dtsi53 clock-names = "pex", "afi", "pll_e", "cml";

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