Searched +full:cmd +full:- +full:crci (Results 1 – 3 of 3) sorted by relevance
| /linux/Documentation/devicetree/bindings/mtd/ |
| H A D | qcom,nandc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - qcom,ipq806x-nand
16 - qcom,ipq4019-nand
17 - qcom,ipq6018-nand
18 - qcom,ipq8074-nand
19 - qcom,sdx55-nand
26 - description: Core Clock
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| /linux/drivers/mtd/nand/raw/ |
| H A D | qcom_nandc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
18 #include <linux/mtd/nand-qpic-common.h>
42 * @cmd_reg: CMD register value
82 * ecc/non-ecc mode for the current nand flash
132 ((u8 *)chip->controller - sizeof(struct qcom_nand_controller)); in get_qcom_nand_controller()
137 return ioread32(nandc->base + offset); in nandc_read()
143 iowrite32(val, nandc->base + offset); in nandc_write()
149 return cw == (ecc->steps - 1); in qcom_nandc_is_last_cw()
153 * nandc_set_read_loc_first() - to set read location first register
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| /linux/arch/arm/boot/dts/qcom/ |
| H A D | qcom-ipq8064.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mfd/qcom-rpm.h>
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
8 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
11 #include <dt-bindings/soc/qcom,gsbi.h>
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