| /linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am652.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include "k3-am65.dtsi" 12 #address-cells = <1>; 13 #size-cells = <0>; 14 cpu-map { 15 cluster0: cluster0 { label 27 compatible = "arm,cortex-a53"; 30 enable-method = "psci"; 31 i-cache-size = <0x8000>; [all …]
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| H A D | k3-am654.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include "k3-am65.dtsi" 12 #address-cells = <1>; 13 #size-cells = <0>; 14 cpu-map { 15 cluster0: cluster0 { label 37 compatible = "arm,cortex-a53"; 40 enable-method = "psci"; 41 i-cache-size = <0x8000>; [all …]
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| H A D | k3-j721s2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 7 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/soc/ti,sci_pm_domain.h> 15 #include "k3-pinctrl.h" 21 interrupt-parent = <&gic500>; 22 #address-cells = <2>; 23 #size-cells = <2>; 28 #address-cells = <1>; [all …]
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| H A D | k3-j7200.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/soc/ti,sci_pm_domain.h> 12 #include "k3-pinctrl.h" 17 interrupt-parent = <&gic500>; 18 #address-cells = <2>; 19 #size-cells = <2>; 24 #address-cells = <1>; [all …]
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| H A D | k3-j721e.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/soc/ti,sci_pm_domain.h> 12 #include "k3-pinctrl.h" 17 interrupt-parent = <&gic500>; 18 #address-cells = <2>; 19 #size-cells = <2>; 24 #address-cells = <1>; [all …]
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| H A D | k3-j722s.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/soc/ti,sci_pm_domain.h> 13 #include "k3-pinctrl.h" 18 interrupt-parent = <&gic500>; 19 #address-cells = <2>; 20 #size-cells = <2>; [all …]
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| /linux/arch/arm64/boot/dts/arm/ |
| H A D | juno-base.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "juno-clocks.dtsi" 3 #include "juno-motherboard.dtsi" 11 compatible = "arm,armv7-timer-mem"; 13 #address-cells = <1>; 14 #size-cells = <1>; 18 frame-number = <1>; 30 #mbox-cells = <1>; 32 clock-names = "apb_pclk"; 36 compatible = "arm,mmu-400", "arm,smmu-v1"; [all …]
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| /linux/arch/arm/boot/dts/samsung/ |
| H A D | exynos4210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 7 * Copyright (c) 2010-2011 Linaro Ltd. 20 #include "exynos4-cpu-thermal.dtsi" 31 bus_acp: bus-acp { 32 compatible = "samsung,exynos-bus"; 34 clock-names = "bus"; 35 operating-points-v2 = <&bus_acp_opp_table>; 38 bus_acp_opp_table: opp-table { 39 compatible = "operating-points-v2"; [all …]
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| H A D | exynos3250.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 17 #include "exynos4-cpu-thermal.dtsi" 18 #include <dt-bindings/clock/exynos3250.h> 19 #include <dt-bindings/interrupt-controller/arm-gic.h> 20 #include <dt-bindings/interrupt-controller/irq.h> 24 interrupt-parent = <&gic>; 25 #address-cells = <1>; 26 #size-cells = <1>; 46 bus_dmc: bus-dmc { 47 compatible = "samsung,exynos-bus"; [all …]
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| /linux/arch/arm64/boot/dts/exynos/ |
| H A D | exynos7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/clock/exynos7-clk.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <2>; 16 #size-cells = <2>; 30 arm-pmu { 31 compatible = "arm,cortex-a57-pmu"; 36 interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>, 42 compatible = "fixed-clock"; [all …]
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| /linux/arch/arm/boot/dts/st/ |
| H A D | ste-dbx5x0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/clock/ste-db8500-clkout.h> 9 #include <dt-bindings/reset/stericsson,db8500-prcc-reset.h> 10 #include <dt-bindings/mfd/dbx500-prcmu.h> 11 #include <dt-bindings/arm/ux500_pm_domains.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/thermal/thermal.h> 16 #address-cells = <1>; [all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sm6115.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 7 #include <dt-bindings/clock/qcom,gcc-sm6115.h> 8 #include <dt-bindings/clock/qcom,sm6115-dispcc.h> 9 #include <dt-bindings/clock/qcom,sm6115-gpucc.h> 10 #include <dt-bindings/clock/qcom,rpmcc.h> 11 #include <dt-bindings/dma/qcom-gpi.h> 12 #include <dt-bindings/firmware/qcom,scm.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interconnect/qcom,rpm-icc.h> [all …]
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| H A D | msm8917.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 4 #include <dt-bindings/clock/qcom,gcc-msm8917.h> 5 #include <dt-bindings/clock/qcom,rpmcc.h> 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/power/qcom-rpmpd.h> 8 #include <dt-bindings/thermal/thermal.h> 11 interrupt-parent = <&intc>; 13 #address-cells = <2>; 14 #size-cells = <2>; [all …]
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| H A D | msm8976.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2016-2022, AngeloGioacchino Del Regno 9 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 10 #include <dt-bindings/clock/qcom,gcc-msm8976.h> 11 #include <dt-bindings/clock/qcom,rpmcc.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/interrupt-controller/irq.h> 15 #include <dt-bindings/power/qcom-rpmpd.h> 18 interrupt-parent = <&intc>; [all …]
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| H A D | sdm630.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h> 8 #include <dt-bindings/clock/qcom,gcc-sdm660.h> 9 #include <dt-bindings/clock/qcom,gpucc-sdm660.h> 10 #include <dt-bindings/clock/qcom,mmcc-sdm660.h> 11 #include <dt-bindings/clock/qcom,rpmcc.h> 12 #include <dt-bindings/firmware/qcom,scm.h> 13 #include <dt-bindings/interconnect/qcom,sdm660.h> 14 #include <dt-bindings/power/qcom-rpmpd.h> 15 #include <dt-bindings/gpio/gpio.h> [all …]
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| /linux/arch/arm/boot/dts/allwinner/ |
| H A D | sun8i-a83t.dtsi | 6 * This file is dual-licensed: you can use it either under the terms 45 #include <dt-bindings/interrupt-controller/arm-gic.h> 47 #include <dt-bindings/clock/sun8i-a83t-ccu.h> 48 #include <dt-bindings/clock/sun8i-de2.h> 49 #include <dt-bindings/clock/sun8i-r-ccu.h> 50 #include <dt-bindings/reset/sun8i-a83t-ccu.h> 51 #include <dt-bindings/reset/sun8i-de2.h> 52 #include <dt-bindings/reset/sun8i-r-ccu.h> 53 #include <dt-bindings/thermal/thermal.h> 56 interrupt-parent = <&gic>; [all …]
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| /linux/arch/arm64/boot/dts/microchip/ |
| H A D | sparx5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/clock/microchip,sparx5.h> 12 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <1>; 23 stdout-path = "serial0:115200n8"; 27 #address-cells = <1>; 28 #size-cells = <0>; [all …]
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| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8192.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/clock/mt8192-clk.h> 9 #include <dt-bindings/gce/mt8192-gce.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/memory/mt8192-larb-port.h> 13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h> 14 #include <dt-bindings/phy/phy.h> 15 #include <dt-bindings/power/mt8192-power.h> [all …]
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| H A D | mt8173.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/mt8173-clk.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/memory/mt8173-larb-port.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/power/mt8173-power.h> 13 #include <dt-bindings/reset/mt8173-resets.h> 14 #include <dt-bindings/gce/mt8173-gce.h> 15 #include <dt-bindings/thermal/thermal.h> [all …]
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3368.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3368-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3368-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; [all …]
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| H A D | rk3399-base.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3399-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3399-power.h> 12 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; [all …]
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| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | r8a779f0.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Device Tree Source for the R-Car S4-8 (R8A779F0) SoC 8 #include <dt-bindings/clock/r8a779f0-cpg-mssr.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/r8a779f0-sysc.h> 14 #address-cells = <2>; 15 #size-cells = <2>; 17 cluster01_opp: opp-table-0 { 18 compatible = "operating-points-v2"; 19 opp-shared; [all …]
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| H A D | r9a07g054.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/r9a07g054-cpg.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 16 audio_clk1: audio1-clk { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 20 clock-frequency = <0>; 23 audio_clk2: audio2-clk { [all …]
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| H A D | r9a07g044.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/r9a07g044-cpg.h> 13 #address-cells = <2>; 14 #size-cells = <2>; 16 audio_clk1: audio1-clk { 17 compatible = "fixed-clock"; 18 #clock-cells = <0>; 20 clock-frequency = <0>; 23 audio_clk2: audio2-clk { [all …]
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| /linux/arch/arm64/boot/dts/hisilicon/ |
| H A D | hi3660.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/hi3660-clock.h> 10 #include <dt-bindings/thermal/thermal.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <2>; 16 #size-cells = <2>; 19 compatible = "arm,psci-0.2"; 24 #address-cells = <2>; 25 #size-cells = <0>; [all …]
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