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/linux/drivers/clocksource/
H A Dtimer-davinci.c67 to_davinci_clockevent(struct clock_event_device *clockevent) in to_davinci_clockevent() argument
69 return container_of(clockevent, struct davinci_clockevent, dev); in to_davinci_clockevent()
73 davinci_clockevent_read(struct davinci_clockevent *clockevent, in davinci_clockevent_read() argument
76 return readl_relaxed(clockevent->base + reg); in davinci_clockevent_read()
79 static void davinci_clockevent_write(struct davinci_clockevent *clockevent, in davinci_clockevent_write() argument
82 writel_relaxed(val, clockevent->base + reg); in davinci_clockevent_write()
117 struct davinci_clockevent *clockevent; in davinci_clockevent_shutdown() local
119 clockevent = to_davinci_clockevent(dev); in davinci_clockevent_shutdown()
121 davinci_tim12_shutdown(clockevent->base); in davinci_clockevent_shutdown()
128 struct davinci_clockevent *clockevent = to_davinci_clockevent(dev); in davinci_clockevent_set_oneshot() local
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H A Dtimer-vt8500.c86 static struct clock_event_device clockevent = { variable
133 clockevent.cpumask = cpumask_of(0); in vt8500_timer_init()
137 &clockevent); in vt8500_timer_init()
140 clockevent.name); in vt8500_timer_init()
144 clockevents_config_and_register(&clockevent, VT8500_TIMER_HZ, in vt8500_timer_init()
H A DKconfig199 where TIMER0 serves as clockevent and TIMER1 serves as clocksource.
309 TIMER0 serves as clockevent while TIMER1 provides clocksource.
530 This enables build of clocksource and clockevent driver for
538 This enables build of a clocksource and clockevent driver for
547 This enables build of a clockevent driver for the Multi-Function
564 This enables build of a clocksource and clockevent driver for
573 This enables build of a clocksource and clockevent driver for
582 This enables the clocksource and the per CPU clockevent driver for the
628 clockevent.
748 and a clockevent.
H A Dmps2-timer.c112 pr_err("failed to get clock for clockevent: %d\n", ret); in mps2_clockevent_init()
118 pr_err("failed to enable clock for clockevent: %d\n", ret); in mps2_clockevent_init()
128 pr_err("failed to map register for clockevent: %d\n", ret); in mps2_clockevent_init()
135 pr_err("failed to get irq for clockevent: %d\n", ret); in mps2_clockevent_init()
162 pr_err("failed to request irq for clockevent: %d\n", ret); in mps2_clockevent_init()
H A Dhyperv_timer.c129 * hv_stimer_init - Per-cpu initialization of the clockevent
139 ce->name = "Hyper-V clockevent"; in hv_stimer_init()
169 * hv_stimer_cleanup - Per-cpu cleanup of the clockevent
182 * must unbind the stimer-based clockevent device so in hv_stimer_cleanup()
190 * there are no other clockevent devices to fallback to. in hv_stimer_cleanup()
261 /* hv_stimer_alloc - Global initialization of the clockevent and stimer0 */
269 * clockevent based on emulated LAPIC timer hardware. in hv_stimer_alloc()
299 * as other clockevent devices. in hv_stimer_alloc()
H A Dtimer-nxp-stm.c267 * registering the clockevent will prevent that. The second in nxp_stm_clockevent_set_next_event()
324 dev_dbg(dev, "Initialized per cpu clockevent name=%s, irq=%d, cpu=%d\n", name, irq, cpu); in nxp_stm_clockevent_per_cpu_init()
417 * As we need a clocksource and a clockevent per cpu, we in nxp_stm_timer_probe()
419 * clockevent which makes the resulting code simpler. in nxp_stm_timer_probe()
453 * Next probed STM will be a per CPU clockevent, until we in nxp_stm_timer_probe()
466 * The number of probed STMs for per CPU clockevent is in nxp_stm_timer_probe()
H A Dsh_tmu.c243 /* notify clockevent layer */ in sh_tmu_interrupt()
439 bool clockevent, bool clocksource) in sh_tmu_register() argument
441 if (clockevent) { in sh_tmu_register()
453 bool clockevent, bool clocksource, in sh_tmu_channel_setup() argument
457 if (!clockevent && !clocksource) in sh_tmu_channel_setup()
476 clockevent, clocksource); in sh_tmu_channel_setup()
H A Dtimer-atmel-pit.c100 * Clockevent device: interrupts every 1/HZ (== pit_cycles * MCK/16)
164 * Set up both clocksource and clockevent support.
218 * so this isn't a 32-bit counter unless we get clockevent irqs. in at91sam926x_pit_dt_init()
H A Dtimer-microchip-pit64b.c65 * struct mchp_pit64b_clkevt - PIT64B clockevent data structure
67 * @clkevt: clockevent
94 /* Default cycles for clockevent timer. */
497 /* 1st request, register clockevent. */ in mchp_pit64b_dt_init()
H A Dtimer-orion.c61 * Clockevent handling.
166 /* setup timer1 as clockevent timer */ in orion_timer_init()
H A Darc_timer.c323 * clockevent setup for boot CPU
332 pr_err("clockevent: missing irq\n"); in arc_clockevent_setup()
344 pr_err("clockevent: unable to request irq\n"); in arc_clockevent_setup()
H A Dsh_cmt.c598 /* setup timeout if no clockevent */ in sh_cmt_start_clocksource()
902 bool clockevent, bool clocksource) in sh_cmt_register() argument
906 if (clockevent) { in sh_cmt_register()
922 unsigned int hwidx, bool clockevent, in sh_cmt_setup_channel() argument
929 if (!clockevent && !clocksource) in sh_cmt_setup_channel()
972 clockevent, clocksource); in sh_cmt_setup_channel()
1127 bool clockevent = i == 0; in sh_cmt_setup() local
1130 clockevent, clocksource, cmt); in sh_cmt_setup()
H A Dtimer-atmel-st.c150 * Our defense here is to have set up the clockevent device so the in clkevt32k_next_event()
241 /* Setup timer clockevent, with minimum of two ticks (important!!) */ in atmel_st_timer_init()
/linux/arch/xtensa/kernel/
H A Dtime.c130 struct clock_event_device *clockevent = &timer->evt; in local_timer_setup() local
134 clockevent->name = timer->name; in local_timer_setup()
135 clockevent->cpumask = cpumask_of(cpu); in local_timer_setup()
136 clockevent->irq = irq_create_mapping(NULL, LINUX_TIMER_INT); in local_timer_setup()
137 if (WARN(!clockevent->irq, "error: can't map timer irq")) in local_timer_setup()
139 clockevents_config_and_register(clockevent, ccount_freq, in local_timer_setup()
/linux/include/clocksource/
H A Dtimer-davinci.h24 * @irq: clockevent and clocksource interrupt resources
25 * @cmp_off: if set - it specifies the compare register used for clockevent
28 * clock half for both clocksource and clockevent and the compare register
/linux/arch/arm/plat-orion/
H A Dtime.c71 * Clockevent handling.
85 * Clear and enable clockevent timer interrupt. in orion_clkevt_next_event()
94 * Setup new clockevent timer value. in orion_clkevt_next_event()
231 * Setup clockevent timer (interrupt-driven). in orion_time_init()
/linux/arch/sparc/kernel/
H A Dirq.h49 #define FEAT_L10_CLOCKEVENT (1 << 1) /* L10 timer is used as a clockevent */
50 #define FEAT_L14_ONESHOT (1 << 2) /* L14 timer clockevent can oneshot */
62 /* generic clockevent features - see FEAT_* above */
/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-beagle-ab4.dts21 /* Unusable as clockevent because of unreliable oscillator, allow to idle */
39 /* Preferred timer for clockevent */
/linux/arch/arm/mach-spear/
H A Dtime.c26 * We would use TIMER0 and TIMER1 as clockevent and clocksource.
32 #define CLKEVT 0 /* gpt0, channel0 as clockevent */
59 * Minimum clocksource/clockevent timer range in seconds
/linux/include/linux/
H A Dclockchips.h53 * - Clockevent source stops in C3 State and needs broadcast support.
66 * Clockevent device is based on a hrtimer for broadcast
134 /* Helpers to verify state of a clockevent device */
/linux/arch/arm/mach-at91/
H A DKconfig203 Select this to get a high resolution clockevent (SAM9X60) or
204 clocksource and clockevent (SAMA7G5) based on Microchip 64-bit
/linux/kernel/time/
H A DKconfig64 lack support for the generic clockevent framework.
89 # only related to the tick functionality. Oneshot clockevent devices
H A Dclockevents.c100 /* The clockevent device is getting replaced. Shut it down. */ in __clockevents_switch_state()
322 /* Shortcut for clockevent devices that can deal with ktime. */ in clockevents_program_event()
340 * Called after a clockevent has been added which might
664 .dev_name = "clockevent",
/linux/arch/arm/mach-mmp/
H A Dtime.c101 * Setup new clockevent timer value. in timer_set_next_event()
128 .name = "clockevent",
/linux/arch/loongarch/include/asm/
H A Dtime.h40 * Initialize the calling CPU's timer interrupt as clockevent device

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