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Searched +full:clock +full:- +full:presc (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/watchdog/
H A Dstm32_iwdg.c1 // SPDX-License-Identifier: GPL-2.0
32 #define IWDG_EWCR 0x14 /* Early Wake-up Register */
100 u32 tout, ptot, presc, iwdg_rlr, iwdg_ewcr, iwdg_pr, iwdg_sr; in stm32_iwdg_start() local
103 dev_dbg(wdd->parent, "%s\n", __func__); in stm32_iwdg_start()
105 if (!wdd->pretimeout) in stm32_iwdg_start()
106 wdd->pretimeout = 3 * wdd->timeout / 4; in stm32_iwdg_start()
108 tout = clamp_t(unsigned int, wdd->timeout, in stm32_iwdg_start()
109 wdd->min_timeout, wdd->max_hw_heartbeat_ms / 1000); in stm32_iwdg_start()
110 ptot = clamp_t(unsigned int, tout - wdd->pretimeout, in stm32_iwdg_start()
111 wdd->min_timeout, tout); in stm32_iwdg_start()
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/linux/drivers/media/dvb-frontends/
H A Dstv6110.c1 // SPDX-License-Identifier: GPL-2.0-or-later
43 return a - b; in abssub()
45 return b - a; in abssub()
50 kfree(fe->tuner_priv); in stv6110_release()
51 fe->tuner_priv = NULL; in stv6110_release()
57 struct stv6110_priv *priv = fe->tuner_priv; in stv6110_write_regs()
61 .addr = priv->i2c_address, in stv6110_write_regs()
73 return -EINVAL; in stv6110_write_regs()
77 return -EINVAL; in stv6110_write_regs()
82 if (fe->ops.i2c_gate_ctrl) in stv6110_write_regs()
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/linux/Documentation/devicetree/bindings/media/i2c/
H A Ddongwoon,dw9768.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Dongchun Zhu <dongchun.zhu@mediatek.com>
13 description: |-
14 The Dongwoon DW9768 is a single 10-bit digital-to-analog (DAC) converter
16 a linear mode driver. The DAC is controlled via a 2-wire (I2C-compatible)
17 serial interface that operates at clock rates up to 1MHz. This chip
24 - dongwoon,dw9768 # for DW9768 VCM
25 - giantec,gt9769 # for GT9769 VCM
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/linux/drivers/tty/serial/
H A Dstm32-usart.c1 // SPDX-License-Identifier: GPL-2.0
9 * Inspired by st-asc.c from STMicroelectronics (c)
16 #include <linux/dma-direction.h>
18 #include <linux/dma-mapping.h>
37 #include "stm32-usart.h"
54 .presc = UNDEF_REG,
76 .presc = UNDEF_REG,
99 .presc = 0x2c,
124 val = readl_relaxed(port->membase + reg); in stm32_usart_set_bits()
126 writel_relaxed(val, port->membase + reg); in stm32_usart_set_bits()
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