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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dxgene.txt1 Device Tree Clock bindings for APM X-Gene
3 This binding uses the common clock binding[1].
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
8 - compatible : shall be one of the following:
9 "apm,xgene-socpll-clock" - for a X-Gene SoC PLL clock
10 "apm,xgene-pcppll-clock" - for a X-Gene PCP PLL clock
11 "apm,xgene-pmd-clock" - for a X-Gene PMD clock
12 "apm,xgene-device-clock" - for a X-Gene device clock
13 "apm,xgene-socpll-v2-clock" - for a X-Gene SoC PLL v2 clock
14 "apm,xgene-pcppll-v2-clock" - for a X-Gene PCP PLL v2 clock
[all …]
H A Dmoxa,moxart-clock.txt1 Device Tree Clock bindings for arch-moxart
3 This binding uses the common clock binding[1].
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
7 MOXA ART SoCs allow to determine PLL output and APB frequencies
14 - compatible : Must be "moxa,moxart-pll-clock"
15 - #clock-cells : Should be 0
16 - reg : Should contain registers location and length
17 - clocks : Should contain phandle + clock-specifier for the parent clock
20 - clock-output-names : Should contain clock name
26 - compatible : Must be "moxa,moxart-apb-clock"
[all …]
H A Dlpc1850-cgu.txt1 * NXP LPC1850 Clock Generation Unit (CGU)
4 peripheral blocks of the LPC18xx. Each independent clock is called
5 a base clock and itself is one of the inputs to the two Clock
9 The CGU selects the inputs to the clock generators from multiple
10 clock sources, controls the clock generation, and routes the outputs
11 of the clock generators through the clock source bus to the output
12 stages. Each output stage provides an independent clock source and
15 - Above text taken from NXP LPC1850 User Manual.
18 This binding uses the common clock binding:
19 Documentation/devicetree/bindings/clock/clock-bindings.txt
[all …]
H A Dqoriq-clock.txt1 * Clock Block on Freescale QorIQ Platforms
14 --------------- -------------
18 1. Clock Block Binding
21 - compatible: Should contain a chip-specific clock block compatible
22 string and (if applicable) may contain a chassis-version clock
25 Chip-specific strings are of the form "fsl,<chip>-clockgen", such as:
26 * "fsl,p2041-clockgen"
27 * "fsl,p3041-clockgen"
28 * "fsl,p4080-clockgen"
29 * "fsl,p5020-clockgen"
[all …]
H A Dmaxim,max9485.txt1 Devicetree bindings for Maxim MAX9485 Programmable Audio Clock Generator
5 - MAX9485_MCLKOUT: A gated, buffered output of the input clock of 27 MHz
6 - MAX9485_CLKOUT: A PLL that can be configured to 16 different discrete
8 - MAX9485_CLKOUT[1,2]: Two gated outputs for MAX9485_CLKOUT
14 - compatible: "maxim,max9485"
15 - clocks: Input clock, must provide 27.000 MHz
16 - cloc
[all...]
H A Dfixed-clock.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/fixed-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Simple fixed-rate clock sources
10 - Michael Turquette <mturquette@baylibre.com>
11 - Stephen Boyd <sboyd@kernel.org>
16 - description:
17 Preferred name is 'clock-<freq>' with <freq> being the output
18 frequency as defined in the 'clock-frequency' property.
[all …]
H A Dfixed-factor-clock.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/clock/fixed-factor-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Simple fixed factor rate clock sources
10 - Michael Turquette <mturquette@baylibre.com>
11 - Stephen Boyd <sboyd@kernel.org>
16 - description:
17 If the frequency is fixed, the preferred name is 'clock-<freq>' with
18 <freq> being the output frequency.
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/
H A Dallwinner,sun8i-r40-tcon-top.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 TCON for HDMI, muxes LCD and TV encoder GPIO output, selects TV
17 encoder clock source and contains additional TV TCON and DSI gates.
22 / [0] TCON-LCD0
25 \ / [1] TCON-LCD1 - LCD1/LVDS1
[all …]
/freebsd/contrib/tzcode/
H A Ddate.12 .\" 2009-05-17 by Arthur David Olson.
4 .SH NAME
5 date \- show and set date and time
13 .B \*-u
15 .B \*-c
17 .B \*-r
35 without arguments writes the date and time to the standard output in
46 The exact output format depends on the locale.
48 If a command-line argument starts with a plus sign (\c
52 that controls what appears in the output.
[all …]
H A Dzic.82 .\" 2009-05-17 by Arthur David Olson.
6 .Sh NAME
11 .Op Fl -help
12 .Op Fl -version
27 .Op Fl t Ar localtime-link
39 .Dq "-" ,
43 .Bl -tag -width indent
44 .It Fl -versio
[all...]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dx-powers,ac100.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mfd/x-powers,ac100.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: X-Powers AC100
10 - Chen-Yu Tsai <wens@csie.org>
14 const: x-powers,ac100
23 "#clock-cells":
27 const: x-powers,ac100-codec
32 clock-output-names:
[all …]
H A Drohm,bd70528-pmic.txt3 BD70528MWV is an ultra-low quiescent current general purpose, single-chip,
4 power management IC for battery-powered portable devices. The IC
5 integrates 3 ultra-low current consumption buck converters, 3 LDOs and 2
6 LED Drivers. Also included are 4 GPIOs, a real-time clock (RTC), a 32kHz
7 clock gate, high-accuracy VREF for use with an external ADC, flexible
8 dual-input power path, 10 bit SAR ADC for battery temperature monitor and
12 - compatible : Should be "rohm,bd70528"
13 - reg : I2C slave address.
14 - interrupts : The interrupt line the device is connected to.
15 - interrupt-controller : To indicate BD70528 acts as an interrupt controller.
[all …]
H A Drockchip,rk809.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schema
[all...]
H A Drockchip,rk805.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
20 - rockchip,rk805
28 '#clock-cells':
30 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
34 clock-output-names:
36 From common clock binding to override the default output clock name.
[all …]
H A Drockchip,rk817.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chris Zhong <zyw@rock-chips.com>
11 - Zhang Qing <zhangqing@rock-chips.com>
21 - rockchip,rk809
22 - rockchip,rk817
30 '#clock-cells':
32 See <dt-bindings/clock/rockchip,rk808.h> for clock IDs.
39 clock-names:
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/ti/davinci/
H A Dpll.txt5 an multiplexers for various clock signals.
8 - compatible: shall be one of:
9 - "ti,da850-pll0" for PLL0 on DA850/OMAP-L138/AM18XX
10 - "ti,da850-pll1" for PLL1 on DA850/OMAP-L138/AM18XX
11 - reg: physical base address and size of the controller's register area.
12 - clocks: phandles corresponding to the clock names
13 - clock-names: names of the clock sources - depends on compatible string
14 - for "ti,da850-pll0", shall be "clksrc", "extclksrc"
15 - for "ti,da850-pll1", shall be "clksrc"
18 - ti,clkmode-square-wave: Indicates that the board is supplying a square
[all …]
/freebsd/contrib/ntp/ntpq/
H A Dntpq.1ntpqmdoc4 .\" EDIT THIS FILE WITH CAUTION (ntpq-opts.mdoc)
6 .\" It has been AutoGen-ed May 25, 2024 at 12:04:29 AM by AutoGen 5.18.16
7 .\" From the definitions ntpq-opts.def
8 .\" and the template file agmdoc-cmd.tpl
9 .Sh NAME
17 .Op Fl \-option\-name Ns Oo Oo Ns "=| " Oc Ns Ar value Oc
30 variables can be assembled, with raw and pretty\-printed output
[all...]
H A Dntpq.mdoc.in4 .\" EDIT THIS FILE WITH CAUTION (ntpq-opts.mdoc)
6 .\" It has been AutoGen-ed May 25, 2024 at 12:04:29 AM by AutoGen 5.18.16
7 .\" From the definitions ntpq-opts.def
8 .\" and the template file agmdoc-cmd.tpl
9 .Sh NAME
17 .Op Fl \-option\-name Ns Oo Oo Ns "=| " Oc Ns Ar value Oc
30 variables can be assembled, with raw and pretty\-printed output
[all...]
H A Dntpq-opts.def1 /* -*- Mode: Text -*- */
7 #include autogen-version.def
9 prog-name = "ntpq";
10 prog-title = "query Network Time Protocol servers";
14 name = ipv4;
15 flags-cant = ipv6;
17 descrip = "Force IPv4 name resolution";
18 doc = <<- _EndOfDoc_
25 name = ipv6;
26 flags-cant = ipv4;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dphy-rockchip-inno-hdmi.txt4 - compatible : should be one of the listed compatibles:
5 * "rockchip,rk3228-hdmi-phy",
6 * "rockchip,rk3328-hdmi-phy";
7 - reg : Address and length of the hdmi phy control register set
8 - clocks : phandle + clock specifier for the phy clocks
9 - clock-names : string, clock name, must contain "sysclk" for system
10 control and register configuration, "refoclk" for crystal-
11 oscillator reference PLL clock input and "refpclk" for pclk-
12 based refeference PLL clock input.
13 - #clock-cells: should be 0.
[all …]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Drt5682.txt7 - compatible : "realtek,rt5682" or "realtek,rt5682i"
9 - reg : The I2C address of the device.
11 - AVDD-supply: phandle to the regulator supplying analog power through the
14 - MICVDD-supply: phandle to the regulator supplying power for the microphone
17 - VBAT-supply: phandle to the regulator supplying battery power through the
20 - DBVDD-supply: phandle to the regulator supplying I/O power through the DBVDD
23 - LDO1-IN-supply: phandle to the regulator supplying power to the digital core
28 - interrupts : The CODEC's interrupt output.
30 - realtek,dmic1-data-pin
35 - realtek,dmic1-clk-pin
[all …]
/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3288-firefly-reload-core.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/input.h>
16 ext_gmac: external-gmac-clock {
17 compatible = "fixed-clock";
18 #clock-cells = <0>;
19 clock-frequency = <125000000>;
20 clock-output-names = "ext_gmac";
24 vcc_flash: flash-regulator {
25 compatible = "regulator-fixed";
26 regulator-name = "vcc_flash";
[all …]
H A Drk3288-miqi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
15 stdout-path = "serial2:115200n8";
23 ext_gmac: external-gmac-clock {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <125000000>;
27 clock-output-names = "ext_gmac";
31 compatible = "gpio-leds";
[all …]
H A Drk3288-r89.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/pwm/pwm.h>
20 ext_gmac: external-gmac-clock {
21 compatible = "fixed-clock";
22 clock-frequency = <125000000>;
23 clock-output-names = "ext_gmac";
24 #clock-cells = <0>;
27 gpio-keys {
[all …]
/freebsd/sys/contrib/device-tree/Bindings/leds/
H A Dleds-lp55xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lp55xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
27 - national,lp5521
28 - national,lp5523
29 - ti,lp55231
30 - ti,lp5562
[all …]

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