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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dqcom,sm8250-camss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/qcom,sm8250-camss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Robert Foss <robert.foss@linaro.org>
18 const: qcom,sm8250-camss
24 clock-names:
26 - const: cam_ahb_clk
27 - const: cam_hf_axi
28 - const: cam_sf_axi
[all …]
H A Dqcom,sc8280xp-camss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sc8280xp-camss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bryan O'Donoghue <bryan.odonoghue@linaro.org>
17 const: qcom,sc8280xp-camss
22 clock-names:
24 - const: camnoc_axi
25 - const: cpas_ahb
26 - const: csiphy0
[all …]
H A Dbrcm,bcm2835-unicam.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/brcm,bcm2835-unicam.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
12 description: |-
14 CSI-2 or CCP2 data from image sensors or similar devices.
26 const: brcm,bcm2835-unicam
30 - description: Unicam block.
31 - description: Clock Manager Image (CMI) block.
[all …]
H A Dti,cal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Benoit Parrot <bparrot@ti.com>
12 description: |-
15 processing capability to connect CSI2 image-sensor modules to the
24 - ti,dra72-cal
26 - ti,dra72-pre-es2-cal
28 - ti,dra76-cal
30 - ti,am654-cal
[all …]
H A Dvideo-interfaces.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interface
[all...]
H A Dsamsung-mipi-csis.txt1 Samsung S5P/Exynos SoC series MIPI CSI-2 receiver (MIPI CSIS)
2 -------------------------------------------------------------
6 - compatible : "samsung,s5pv210-csis" for S5PV210 (S5PC110),
7 "samsung,exynos4210-csis" for Exynos4210 (S5PC210),
8 "samsung,exynos4212-csis" for Exynos4212/Exynos4412,
9 "samsung,exynos5250-csis" for Exynos5250;
10 - reg : offset and length of the register set for the device;
11 - interrupts : should contain MIPI CSIS interrupt; the format of the
13 - bus-width : maximum number of data lanes supported (SoC specific);
14 - vddio-supply : MIPI CSIS I/O and PLL voltage supply (e.g. 1.8V);
[all …]
H A Drenesas,rzg2l-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/renesas,rzg2l-csi2.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas RZ/G2L (and alike SoC's) MIPI CSI-2 receiver
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
14 The CSI-2 receiver device provides MIPI CSI-2 capabilities for the Renesas RZ/G2L
15 (and alike SoCs). MIPI CSI-2 is part of the CRU block which is used in conjunction
21 - enum:
22 - renesas,r9a07g043-csi2 # RZ/G2UL
[all …]
H A Drockchip-isp1.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/media/rockchip-isp1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Helen Koike <helen.koike@collabora.com>
19 - fsl,imx8mp-isp
20 - rockchip,px30-cif-isp
21 - rockchip,rk3399-cif-isp
30 interrupt-names:
32 - const: isp
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-j721e-sk-csi2-dual-imx219.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
4 * on J721E SK, AM68 SK or AM69-SK board.
5 * https://datasheets.raspberrypi.org/camera/camera-v2-schematic.pdf
7 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
10 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include "k3-pinctrl.h"
17 clk_imx219_fixed: imx219-xclk {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
[all …]
H A Dk3-am625-beagleplay-csi2-tevi-ov5640.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Technexion TEVI-OV5640-*-RPI - OV5640 camera module
4 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
7 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
13 clk_ov5640_fixed: ov5640-xclk {
14 compatible = "fixed-clock";
15 #clock-cells = <0>;
16 clock-frequency = <24000000>;
21 p11-hog {
[all …]
H A Dk3-am625-beagleplay-csi2-ov5640.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * ALINX AN5641 & Digilent PCam 5C - OV5640 camera module
4 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
7 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
13 clk_ov5640_fixed: ov5640-xclk {
14 compatible = "fixed-clock";
15 #clock-cells = <0>;
16 clock-frequency = <12000000>;
21 p11-hog {
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Dr8a779a0-falcon-csi-dsi.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Falcon CSI/DSI sub-board
8 #include <dt-bindings/media/video-interfaces.h>
14 #address-cells = <1>;
15 #size-cells = <0>;
21 clock-lanes = <0>;
22 data-lanes = <1 2 3 4>;
23 remote-endpoint = <&max96712_out0>;
33 #address-cells = <1>;
34 #size-cells = <0>;
[all …]
H A Dhihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi1 // SPDX-License-Identifier: GPL-2.0
10 #include "aistarvision-mipi-adapter-2.1.dtsi"
18 clock-lanes = <0>;
19 data-lanes = <1 2>;
20 remote-endpoint = <&ov5645_ep>;
32 clock-lanes = <0>;
33 data-lanes = <1 2>;
34 remote-endpoint = <&imx219_ep>;
41 pinctrl-0 = <&i2c3_pins>;
42 pinctrl-names = "default";
[all …]
H A Dr8a779g0-white-hawk-csi-dsi.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the R-Car V4H White Hawk CSI/DSI sub-board
8 #include <dt-bindings/media/video-interfaces.h>
14 #address-cells = <1>;
15 #size-cells = <0>;
21 bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>;
22 clock-lanes = <0>;
23 data-lanes = <1 2 3>;
24 remote-endpoint = <&max96712_out0>;
34 #address-cells = <1>;
[all …]
H A Dwhite-hawk-csi-dsi.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the White Hawk CSI/DSI sub-board
8 #include <dt-bindings/media/video-interfaces.h>
14 #address-cells = <1>;
15 #size-cells = <0>;
21 bus-type = <MEDIA_BUS_TYPE_CSI2_CPHY>;
22 clock-lanes = <0>;
23 data-lanes = <1 2 3>;
24 remote-endpoint = <&max96712_out0>;
34 #address-cells = <1>;
[all …]
H A Dr8a774c0-ek874-mipi-2.1.dts1 // SPDX-License-Identifier: GPL-2.0
4 * connected with aistarvision-mipi-v2-adapter board
9 /dts-v1/;
10 #include "r8a774c0-ek874.dts"
13 #include "aistarvision-mipi-adapter-2.1.dtsi"
16 …model = "Silicon Linux RZ/G2E evaluation kit EK874 (CAT874 + CAT875) with aistarvision-mipi-v2-ada…
17 compatible = "si-linux,cat875", "si-linux,cat874", "renesas,r8a774c0";
38 clock-lanes = <0>;
39 data-lanes = <1 2>;
40 remote-endpoint = <&ov5645_ep>;
[all …]
H A Drz-smarc-cru-csi-ov5645.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 compatible = "regulator-fixed";
12 regulator-name = "camera_vdddo";
13 regulator-min-microvolt = <1800000>;
14 regulator-max-microvolt = <1800000>;
15 regulator-always-on;
19 compatible = "regulator-fixed";
20 regulator-name = "camera_vdda";
21 regulator-min-microvolt = <2800000>;
22 regulator-max-microvolt = <2800000>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/i2c/
H A Dadv748x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kieran Bingham <kieran.bingham@ideasonboard.com>
11 - Niklas Söderlund <niklas.soderlund@ragnatech.se>
15 HDMI receiver. They can output CSI-2 on two independent outputs TXA and TXB
21 - enum:
22 - adi,adv7481
23 - adi,adv7482
29 The ADV748x has up to twelve 256-byte maps that can be accessed via the
[all …]
H A Dtc358743.txt1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge
3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts
4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C.
8 - compatible: value should be "toshiba,tc358743"
9 - clocks, clock-names: should contain a phandle link to the reference clock
10 source, the clock input is named "refclk".
14 - reset-gpios: gpio phandle GPIO connected to the reset pin
15 - interrupts: GPIO connected to the interrupt pin
16 - data-lanes: should be <1 2 3 4> for four-lane operation,
17 or <1 2> for two-lane operation
[all …]
H A Dov2680.txt1 * Omnivision OV2680 MIPI CSI-2 sensor
4 - compatible: should be "ovti,ov2680".
5 - clocks: reference to the xvclk input clock.
6 - clock-names: should be "xvclk".
7 - DOVDD-supply: Digital I/O voltage supply.
8 - DVDD-supply: Digital core voltage supply.
9 - AVDD-supply: Analog voltage supply.
12 - reset-gpios: reference to the GPIO connected to the powerdown/reset pin,
18 Documentation/devicetree/bindings/media/video-interfaces.txt.
20 Endpoint node required properties for CSI-2 connection are:
[all …]
H A Dov5640.txt1 * Omnivision OV5640 MIPI CSI-2 / parallel sensor
4 - compatible: should be "ovti,ov5640"
5 - clocks: reference to the xclk input clock.
6 - clock-names: should be "xclk".
7 - DOVDD-supply: Digital I/O voltage supply, 1.8 volts
8 - AVDD-supply: Analog voltage supply, 2.8 volts
9 - DVDD-supply: Digital core voltage supply, 1.5 volts
12 - reset-gpios: reference to the GPIO connected to the reset pin, if any.
14 - powerdown-gpios: reference to the GPIO connected to the powerdown pin,
16 - rotation: as defined in
[all …]
/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dphy-cadence-torrent.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Swapnil Jakhade <sjakhade@cadence.com>
17 - Yuti Amonkar <yamonkar@cadence.com>
22 - cdns,torrent-phy
23 - ti,j7200-serdes-10g
24 - ti,j721e-serdes-10g
26 '#address-cells':
[all …]
H A Dphy-cadence-sierra.txt2 -----------------------
5 - compatible: Must be "cdns,sierra-phy-t0" for Sierra in Cadence platform
6 Must be "ti,sierra-phy-t0" for Sierra in TI's J721E SoC.
7 - resets: Must contain an entry for each in reset-names.
9 - reset-names: Must include "sierra_reset" and "sierra_apb".
13 - reg: register range for the PHY.
14 - #address-cells: Must be 1
15 - #size-cells: Must be 0
18 - clocks: Must contain an entry in clock-names.
19 See ../clocks/clock-bindings.txt for details.
[all …]
H A Dnvidia,tegra124-xusb-padctl.txt4 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
7 documentation. Each such "pad" may control either one or multiple lanes,
8 and thus contains any logic common to all its lanes. Each lane can be
11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
13 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
14 contains a software-configurable mux that sits between the I/O controller
15 ports (e.g. PCIe) and the lanes.
17 In addition to per-lane configuration, USB 3.0 ports may require additional
18 settings on a per-board basis.
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/xilinx/
H A Dxlnx,csi2rxss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx MIPI CSI-2 Receiver Subsystem
10 - Vishal Sagar <vishal.sagar@amd.com>
13 The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
16 The subsystem consists of a MIPI D-PHY in slave mode which captures the
17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
20 For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem.
21 Please note that this bindings includes only the MIPI CSI-2 Rx controller
[all …]

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