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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Drealtek,rtl82xx.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
20 - ethernet-phy-id001c.c800
21 - ethernet-phy-id001c.c816
22 - ethernet-phy-id001c.c838
23 - ethernet-phy-id001c.c840
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/freebsd/sys/contrib/device-tree/Bindings/net/can/
H A Dsja1000.txt5 - compatible : should be one of "nxp,sja1000", "technologic,sja1000".
7 - reg : should specify the chip select, address offset and size required
10 - interrupts: property with a value describing the interrupt source
15 - reg-io-width : Specify the size (in bytes) of the IO accesses that
20 - nxp,external-clock-frequency : Frequency of the external oscillator
25 - nxp,tx-output-mode : operation mode of the TX output control logic:
26 <0x0> : bi-phase output mode
31 - nxp,tx-output-config : TX output pin configuration:
33 <0x02> : TX0 pull-down (default)
34 <0x04> : TX0 pull-up
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H A Dnxp,sja1000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfgang Grandegger <wg@grandegger.com>
15 - enum:
16 - nxp,sja1000
17 - technologic,sja1000
18 - items:
19 - enum:
20 - renesas,r9a06g032-sja1000 # RZ/N1D
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/freebsd/sys/dev/iicbus/rtc/
H A Dnxprtc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * Driver for NXP real-time clock/calendar chips:
31 * - PCF8563 = low power, countdown timer
32 * - PCA8565 = like PCF8563, automotive temperature range
33 * - PCF8523 = low power, countdown timer, oscillator freq tuning, 2 timers
34 * - PCF2127 = like PCF8523, industrial, tcxo, tamper/ts, i2c & spi, 512B ram
35 * - PCA2129 = like PCF8523, automotive, tcxo, tamper/ts, i2c & spi, (note 1)
36 * - PCF2129 = like PCF8523, industrial, tcxo, tamper/ts, i2c & spi, (note 1)
100 * PCF2127-specific registers, bits, and masks.
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/freebsd/sys/contrib/device-tree/src/arm/nuvoton/
H A Dnuvoton-npcm750-pincfg-evb.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 pin8_input: pin8-input {
8 bias-disable;
9 input-enable;
11 pin9_output_high: pin9-output-high {
13 bias-disable;
14 output-high;
16 pin10_input: pin10-input {
18 bias-disable;
19 input-enable;
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H A Dnuvoton-npcm750-runbmc-olympus-pincfg.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 gpio0ol_pins: gpio0ol-pins {
8 bias-disable;
9 output-low;
11 gpio1ol_pins: gpio1ol-pins {
13 bias-disable;
14 output-low;
16 gpio2ol_pins: gpio2ol-pins {
18 bias-disable;
19 output-low;
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dnuvoton,npcm845-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nuvoton,npcm845-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tomer Maimon <tmaimon77@gmail.com>
13 The Nuvoton BMC NPCM8XX Pin Controller multi-function routed through
20 const: nuvoton,npcm845-pinctrl
25 '#address-cells':
28 '#size-cells':
44 gpio-controller: true
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H A Dnuvoton,npcm7xx-pinctrl.txt3 The Nuvoton BMC NPCM7XX Pin Controller multi-function routed through
9 - #address-cells : should be 1.
10 - #size-cells : should be 1.
11 - compatible : "nuvoton,npcm750-pinctrl" for Poleg NPCM7XX.
12 - ranges : defines mapping ranges between pin controller node (parent)
19 Required GPIO Bank subnode-properties:
20 - reg : specifies physical base address and size of the GPIO
22 - gpio-controller : Marks the device node as a GPIO controller.
23 - #gpio-cells : Must be <2>. The first cell is the gpio pin number
25 - interrupts : contain the GPIO bank interrupt with flags for falling edge.
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mp-debix-som-a-bmb-08.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include "imx8mp-debix-som-a.dtsi"
12 model = "Polyhex i.MX8MPlus Debix SOM A on BMB-08";
13 compatible = "polyhex,imx8mp-debix-som-a-bmb-08", "polyhex,imx8mp-debix-som-a",
22 stdout-path = &uart2;
25 reg_baseboard_vdd3v3: regulator-baseboard-vdd3v3 {
26 compatible = "regulator-fixed";
27 regulator-min-microvolt = <3300000>;
28 regulator-max-microvolt = <3300000>;
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H A Dimx93-14x14-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
13 compatible = "fsl,imx93-14x14-evk", "fsl,imx93";
16 stdout-path = &lpuart1;
19 reserved-memory {
20 #address-cells = <2>;
21 #size-cells = <2>;
25 compatible = "shared-dma-pool";
27 alloc-ranges = <0 0x80000000 0 0x40000000>;
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H A Dimx93-9x9-qsb.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
13 compatible = "fsl,imx93-9x9-qsb", "fsl,imx93";
16 stdout-path = &lpuart1;
19 reserved-memory {
20 #address-cells = <2>;
21 #size-cells = <2>;
25 compatible = "shared-dma-pool";
28 linux,cma-default;
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H A Dimx8mp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
13 compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
16 stdout-path = &uart2;
19 backlight_lvds: backlight-lvds {
20 compatible = "pwm-backlight";
22 brightness-levels = <0 100>;
23 num-interpolated-steps = <100>;
24 default-brightness-level = <100>;
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/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dstm32mp135f-dhcor-dhsbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 * DHCR-STM32MP135F-C100-R051-EE-F0409-SPI4-RTC-WBT-I-01LG
7 * DHCOR PCB number: 718-100 or newer
8 * DHSBC PCB number: 719-100 or newer
11 /dts-v1/;
13 #include <dt-bindings/regulator/st,stm32mp13-regulator.h>
16 #include "stm32mp13xx-dhcor-som.dtsi"
20 compatible = "dh,stm32mp135f-dhcor-dhsbc",
21 "dh,stm32mp135f-dhcor-som",
32 stdout-path = "serial0:115200n8";
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dbaikal,bt1-ccu-div.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/clock/baikal,bt1-ccu-div.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Baikal-T1 Clock Control Unit Dividers
11 - Serge Semin <fancer.lancer@gmail.com>
14 Clocks Control Unit is the core of Baikal-T1 SoC System Controller
18 IP-blocks or to groups of blocks (clock domains). The transformation is done
19 by means of an embedded into CCU PLLs and gateable/non-gateable dividers. The
22 registers. Baikal-T1 CCU is logically divided into the next components:
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/freebsd/sys/arm/ti/omap4/pandaboard/
H A Dpandaboard.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
74 * usb_hub_init - initialises and resets the external USB hub
81 * .-------------. .--------------. .----------------.
84 * | CLK | <------ | CLKOUT | | |
85 * | STP | ------> | STP | | |
86 * | DIR | <------ | DIR | | |
87 * | NXT | <------ | NXT | | |
88 * | DAT0 | <-----> | DAT0 | | |
89 * | DAT1 | <-----> | DAT1 DP | <-----> | DP |
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Dpx30.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/px30-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-binding
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/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dtegra234-clock.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. */
294 /** @brief controls MPHY_FORCE_LS_MODE upon enable & disable */
352 /** @brief DP macro feedback clock (same as LINKA_SYM CLKOUT) */
/freebsd/sys/dev/aic7xxx/
H A Daic79xx.reg1 /*-
4 * Copyright (c) 1994-2001, 2004 Justin T. Gibbs.
5 * Copyright (c) 2000-2002 Adaptec Inc.
19 * 3. Neither the names of the above-listed copyright holders nor the names
60 if ((ahd->bugs & AHD_SET_MODE_BUG) != 0) { \
67 if ((ahd->bugs & AHD_SET_MODE_BUG) != 0) { \
74 if ((ahd->bugs & AHD_INTCOLLISION_BUG) != 0) { \
173 * A command with a non-zero
795 * PCI-X Control
1759 field CLKOUT 0x80
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