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Searched full:clk_ext1 (Results 1 – 6 of 6) sorted by relevance

/linux/drivers/clk/imx/
H A Dclk-imx8mn.c68 "clk_ext1", "clk_ext4", };
72 "clk_ext1", "clk_ext3", };
139 "clk_ext1", "clk_ext2", "clk_ext3",
215 "sys_pll1_40m", "sys_pll3_out", "clk_ext1",
219 "sys_pll1_40m", "sys_pll3_out", "clk_ext1",
232 "audio_pll1_out", "clk_ext1", };
236 "audio_pll1_out", "clk_ext1", };
240 "audio_pll1_out", "clk_ext1", };
244 "audio_pll1_out", "clk_ext1", };
248 "audio_pll1_out", "clk_ext1", };
[all …]
H A Dclk-imx8mm.c69 "sys_pll1_40m", "audio_pll2_out", "clk_ext1", "clk_ext4", };
72 "sys_pll1_40m", "audio_pll2_out", "clk_ext1", "clk_ext3", };
119 …ar *imx8mm_pcie1_phy_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll2_500m", "clk_ext1", "clk_ext2",
132 "sys_pll1_133m", "osc_hdmi", "clk_ext1", "clk_ext2", };
141 "sys_pll1_133m", "osc_hdmi", "clk_ext1", "clk_ext2", };
158 … *imx8mm_enet_timer_sels[] = {"osc_24m", "sys_pll2_100m", "audio_pll1_out", "clk_ext1", "clk_ext2",
216 "sys_pll3_out", "clk_ext1", "sys_pll1_80m", "video_pll1_out", };
219 "sys_pll3_out", "clk_ext1", "sys_pll1_80m", "video_pll1_out", };
228 "video_pll1_out", "sys_pll1_80m", "audio_pll1_out", "clk_ext1" };
269 …tic const char *imx8mm_pcie2_phy_sels[] = {"osc_24m", "sys_pll2_100m", "sys_pll2_500m", "clk_ext1",
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H A Dclk-imx8mq.c69 …5m", "sys1_pll_800m", "sys3_pll_out", "sys1_pll_400m", "audio_pll2_out", "clk_ext1", "clk_ext4", };
72 "sys1_pll_40m", "audio_pll2_out", "clk_ext1", "clk_ext3", };
118 …nst imx8mq_pcie1_phy_sels[] = {"osc_25m", "sys2_pll_100m", "sys2_pll_500m", "clk_ext1", "clk_ext2",
128 …l1_out", "audio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_ext1", "clk_ext2", };
134 …l1_out", "audio_pll2_out", "video_pll1_out", "sys1_pll_133m", "osc_27m", "clk_ext1", "clk_ext2", };
147 …t imx8mq_enet_timer_sels[] = {"osc_25m", "sys2_pll_100m", "audio_pll1_out", "clk_ext1", "clk_ext2",
205 "sys3_pll_out", "clk_ext1", "sys1_pll_80m", "video_pll1_out", };
208 "sys3_pll_out", "clk_ext1", "sys1_pll_80m", "video_pll1_out", };
217 "sys1_pll_80m", "audio_pll1_out", "clk_ext1", };
258 …st char * const imx8mq_pcie2_phy_sels[] = {"osc_25m", "sys2_pll_100m", "sys2_pll_500m", "clk_ext1",
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/linux/Documentation/devicetree/bindings/clock/
H A Dimx93-clock.yaml39 - const: clk_ext1
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mn.dtsi188 clk_ext1: clock-ext1 { label
192 clock-output-names = "clk_ext1";
639 clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
641 clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
H A Dimx95.dtsi253 clk_ext1: clock-ext1 { label
257 clock-output-names = "clk_ext1";