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/linux/Documentation/devicetree/bindings/input/
H A Dsyna,rmi4.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jason A. Donenfeld <Jason@zx2c4.com>
11 - Matthias Schiffer <matthias.schiffer@ew.tq-group.com
12 - Vincent Huang <vincent.huang@tw.synaptics.com>
22 - syna,rmi4-i2c
23 - syna,rmi4-spi
28 '#address-cells':
31 '#size-cells':
[all …]
/linux/drivers/input/rmi4/
H A Drmi_2d_sensor.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2011-2016 Synaptics Incorporated
16 #define RMI_2D_REL_POS_MIN -128
26 struct rmi_2d_axis_alignment *axis_align = &sensor->axis_align; in rmi_2d_sensor_abs_process()
29 if (obj->type == RMI_2D_OBJECT_NONE) in rmi_2d_sensor_abs_process()
32 if (axis_align->flip_x) in rmi_2d_sensor_abs_process()
33 obj->x = sensor->max_x - obj->x; in rmi_2d_sensor_abs_process()
35 if (axis_align->flip_y) in rmi_2d_sensor_abs_process()
36 obj->y = sensor->max_y - obj->y; in rmi_2d_sensor_abs_process()
38 if (axis_align->swap_axes) in rmi_2d_sensor_abs_process()
[all …]
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_util.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
4 * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
15 #define REG_MASK(n) ((BIT(n)) - 1)
41 * struct dpu_hw_blk - opaque hardware block object
52 * @ clip: clip shift
56 * @ thr_high: low threshold
59 * @ adjust_a: A-coefficients for mapping curve
60 * @ adjust_b: B-coefficients for mapping curve
61 * @ adjust_c: C-coefficients for mapping curve
[all …]
/linux/drivers/gpu/drm/
H A Ddrm_panic.c1 // SPDX-License-Identifier: GPL-2.0 or MIT
11 #include <linux/iosys-map.h>
64 * It's intended for end-user, so have minimal technical/debug information.
72 * It will display only one static frame, so performance optimizations are low
81 #define PANIC_LINE(s) {.len = sizeof(s) - 1, .txt = s}
94 PANIC_LINE(" .--. _"),
114 if (!logo || logo->type != LINUX_LOGO_MONO) in drm_panic_setup_logo()
118 logo_data = kmemdup(logo->data, in drm_panic_setup_logo()
119 size_mul(DIV_ROUND_UP(logo->width, BITS_PER_BYTE), logo->height), in drm_panic_setup_logo()
122 return -ENOMEM; in drm_panic_setup_logo()
[all …]
/linux/drivers/net/wireless/broadcom/b43/
H A Dphy_n.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 /* N-PHY registers. */
18 #define B43_NPHY_4WI_ADDR B43_PHY_N(0x00B) /* Four-wire bus address */
19 #define B43_NPHY_4WI_DATAHI B43_PHY_N(0x00C) /* Four-wire bus data high */
20 #define B43_NPHY_4WI_DATALO B43_PHY_N(0x00D) /* Four-wire bus data low */
21 #define B43_NPHY_BIST_STAT0 B43_PHY_N(0x00E) /* Built-in self test status 0 */
22 #define B43_NPHY_BIST_STAT1 B43_PHY_N(0x00F) /* Built-in self test status 1 */
26 #define B43_NPHY_C1_BCLIPBKOFF B43_PHY_N(0x01A) /* Core 1 barely clip backoff */
27 #define B43_NPHY_C1_CCK_BCLIPBKOFF B43_PHY_N(0x01B) /* Core 1 CCK barely clip backoff */
31 #define B43_NPHY_C1_CGAINI_CLIPGBKOFF 0x03E0 /* Clip gain backoff */
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8994-msft-lumia-octagon.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/gpio-keys.h>
14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
20 /delete-node/ &adsp_mem;
21 /delete-node/ &audio_mem;
22 /delete-node/ &cont_splash_mem;
23 /delete-node/ &mba_mem;
24 /delete-node/ &mpss_mem;
25 /delete-node/ &peripheral_region;
[all …]
H A Dsdm845-xiaomi-polaris.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/input/linux-event-codes.h>
13 #include <dt-bindings/sound/qcom,q6afe.h>
14 #include <dt-bindings/sound/qcom,q6asm.h>
16 #include "sdm845-wcd9340.dtsi"
25 /delete-node/ &rmtfs_mem;
[all …]
/linux/drivers/media/i2c/
H A Dov8858.c1 // SPDX-License-Identifier: GPL-2.0
22 #include <media/media-entity.h>
23 #include <media/v4l2-async.h>
24 #include <media/v4l2-common.h>
25 #include <media/v4l2-ctrls.h>
26 #include <media/v4l2-device.h>
27 #include <media/v4l2-event.h>
28 #include <media/v4l2-fwnode.h>
29 #include <media/v4l2-mediabus.h>
30 #include <media/v4l2-subdev.h>
[all …]
H A Dar0521.c1 // SPDX-License-Identifier: GPL-2.0
4 * - Przemysłowy Instytut Automatyki i Pomiarów PIAP
12 #include <media/v4l2-ctrls.h>
13 #include <media/v4l2-fwnode.h>
14 #include <media/v4l2-subdev.h>
145 return &container_of(ctrl->handler, struct ar0521_dev, in ctrl_to_sd()
146 ctrls.handler)->sd; in ctrl_to_sd()
156 return div_u64(v + d - 1, d); in div64_round_up()
161 switch (sensor->fmt.code) { in ar0521_code_to_bpp()
166 return -EINVAL; in ar0521_code_to_bpp()
[all …]
H A Dov772x.c1 // SPDX-License-Identifier: GPL-2.0
12 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
26 #include <linux/v4l2-mediabus.h>
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-device.h>
33 #include <media/v4l2-event.h>
34 #include <media/v4l2-fwnode.h>
35 #include <media/v4l2-image-sizes.h>
36 #include <media/v4l2-subdev.h>
41 #define GAIN 0x00 /* AGC - Gain control gain setting */
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/linux/drivers/gpu/drm/i915/display/
H A Dintel_atomic_plane.c28 * implement legacy plane updates (i.e., drm_plane->update_plane() and
29 * drm_plane->disable_plane()). This allows plane updates to use the
34 #include <linux/dma-fence-chain.h>
35 #include <linux/dma-resv.h>
60 __drm_atomic_helper_plane_state_reset(&plane_state->uapi, &plane->base); in intel_plane_state_reset()
62 plane_state->scaler_id = -1; in intel_plane_state_reset()
72 return ERR_PTR(-ENOMEM); in intel_plane_alloc()
77 return ERR_PTR(-ENOMEM); in intel_plane_alloc()
82 plane->base.state = &plane_state->uapi; in intel_plane_alloc()
89 intel_plane_destroy_state(&plane->base, plane->base.state); in intel_plane_free()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/dce60/
H A Ddce60_hw_sequencer.c56 struct resource_context *res_ctx = &context->res_ctx; in dce60_should_enable_fbc()
57 unsigned int underlay_idx = dc->res_pool->underlay_pipe_index; in dce60_should_enable_fbc()
60 ASSERT(dc->fbc_compressor); in dce60_should_enable_fbc()
63 if (!dc->ctx->fbc_gpu_addr) in dce60_should_enable_fbc()
67 if (context->stream_count != 1) in dce60_should_enable_fbc()
70 for (i = 0; i < dc->res_pool->pipe_count; i++) { in dce60_should_enable_fbc()
71 if (res_ctx->pipe_ctx[i].stream) { in dce60_should_enable_fbc()
73 pipe_ctx = &res_ctx->pipe_ctx[i]; in dce60_should_enable_fbc()
79 if (pipe_ctx->pipe_idx != underlay_idx) { in dce60_should_enable_fbc()
86 if (i == dc->res_pool->pipe_count) in dce60_should_enable_fbc()
[all …]
/linux/drivers/staging/media/ipu3/include/uapi/
H A Dintel-ipu3.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /* Copyright (C) 2017 - 2018 Intel Corporation */
11 /* Vendor specific - used for IPU3 camera sub-system */
17 /* from include/uapi/linux/v4l2-controls.h */
26 #define IPU3_UAPI_GRID_START_MASK ((1 << 12) - 1)
34 * struct ipu3_uapi_grid_config - Grid plane config
51 * @y_start: Y value of top left corner of ROI
53 * @y_end: Y value of bottom right corner of ROI
56 * create a grid-based output, and the data is then divided into "slices".
71 * struct ipu3_uapi_awb_set_item - Memory layout for each cell in AWB
[all …]
/linux/drivers/gpu/drm/amd/display/modules/color/
H A Dcolor_gamma.c41 // If x points are changed, then PQ Y points will be misaligned and a new
43 // The last point is above PQ formula range (0-125 in normalized FP16)
46 // first couple points are 0 - HW LUT is mirrored around zero, so making first
47 // segment 0 to 0 will effectively clip it, and these are very low PQ codes
48 // min nonzero value below (216825) is a little under 12-bit PQ code 1.
146 * X[i] = 2 * X[i-NUM_PTS_IN_REGION] for i>=16
164 /* one-time setup of X points */
176 for (segment = 6; segment > (6 - NUM_REGIONS); segment--) { in setup_x_points_distribution()
180 seg_offset = (segment + (NUM_REGIONS - 7)) * NUM_PTS_IN_REGION; in setup_x_points_distribution()
187 (coordinates_x[index-1].x, increment); in setup_x_points_distribution()
[all …]
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_resource.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
95 dc->ctx->logger
100 #define UNABLE_TO_SPLIT -1
230 init_data->num_virtual_links, dc); in dc_create_resource_pool()
234 init_data->num_virtual_links, dc); in dc_create_resource_pool()
238 init_data->num_virtual_links, dc); in dc_create_resource_pool()
243 init_data->num_virtual_links, dc); in dc_create_resource_pool()
247 init_data->num_virtual_links, dc); in dc_create_resource_pool()
251 init_data->num_virtual_links, dc); in dc_create_resource_pool()
255 init_data->num_virtual_links, dc); in dc_create_resource_pool()
[all …]
/linux/tools/power/pm-graph/
H A DREADME8 pm-graph: suspend/resume/boot timing analysis tools
11 …Home Page: https://www.intel.com/content/www/us/en/developer/topic-technology/open/pm-graph/overvi…
13 Report bugs/issues at bugzilla.kernel.org Tools/pm-graph
14 - https://bugzilla.kernel.org/buglist.cgi?component=pm-graph&product=Tools
17 - Getting Started:
20 - Feature Summary:
21 https://www.intel.com/content/www/us/en/developer/topic-technology/open/pm-graph/features.html
23 - upstream version in git:
24 git clone https://github.com/intel/pm-graph/
27 - Overview
[all …]
H A Dsleepgraph.py2 # SPDX-License-Identifier: GPL-2.0-only
21 # https://01.org/pm-graph
23 # git@github.com:intel/pm-graph
36 # CONFIG_DEVMEM=y
37 # CONFIG_PM_DEBUG=y
38 # CONFIG_PM_SLEEP_DEBUG=y
39 # CONFIG_FTRACE=y
40 # CONFIG_FUNCTION_TRACER=y
41 # CONFIG_FUNCTION_GRAPH_TRACER=y
42 # CONFIG_KPROBES=y
[all …]
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-lg-x3.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/mfd/max77620.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-cpu-opp.dtsi"
11 #include "tegra30-cpu-opp-microvolt.dtsi"
14 chassis-type = "handset";
30 * pre-existing /chosen node to be available to insert the
[all …]
/linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/
H A Ddce110_hwseq.c74 * For eDP, after power-up/power/down,
84 hws->ctx
87 ctx->logger
89 struct dc_context *ctx = dc->ctx
92 hws->regs->reg
96 hws->shifts->field_name, hws->masks->field_name
104 .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
107 .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
110 .crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
113 .crtc = (mmCRTCV_GSL_CONTROL - mmCRTC_GSL_CONTROL),
[all …]
/linux/drivers/gpu/drm/msm/registers/adreno/
H A Da6xx.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
9 <!--
12 - "cmd" - the register is used outside of renderpass and blits,
14 - "rp_blit" - the register is used inside renderpass or blits
21 -->
23 <!-- these might be same as a5xx -->
39 <value value="0x0c" name="FMT6_1_5_5_5_UNORM"/> <!-- read only -->
60 <value value="0x31" name="FMT6_8_8_8_X8_UNORM"/> <!-- samples 1 for alpha -->
[all …]
H A Da5xx.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
32 <value value="0x37" name="RB5_R10G10B10A2_UNORM"/> <!-- GL_RGB10_A2 -->
33 <value value="0x3a" name="RB5_R10G10B10A2_UINT"/> <!-- GL_RGB10_A2UI -->
34 <value value="0x42" name="RB5_R11G11B10_FLOAT"/> <!-- GL_R11F_G11F_B10F -->
251 <value value="8" name="BLIT_ZS"/> <!-- depth or combined depth+stencil -->
252 <value value="9" name="BLIT_S"/> <!-- separate stencil -->
255 <!-- see comment in a4xx.xml about script to extract countables from test-perf output -->
851 <!-- CP Interrupt bits -->
[all …]
/linux/drivers/net/wireless/intel/iwlegacy/
H A Dcommon.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
8 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 #define IL_ERR(f, a...) dev_err(&il->pci_dev->dev, f, ## a)
32 #define IL_WARN(f, a...) dev_warn(&il->pci_dev->dev, f, ## a)
33 #define IL_WARN_ONCE(f, a...) dev_warn_once(&il->pci_dev->dev, f, ## a)
34 #define IL_INFO(f, a...) dev_info(&il->pci_dev->dev, f, ## a)
46 #define U32_PAD(n) ((4-(n))&0x3)
48 /* CT-KILL constants */
56 * Use default noise value of -127 ... this is below the range of measurable
[all …]
/linux/drivers/video/fbdev/
H A Datafb.c2 * linux/drivers/video/atafb.c -- Atari builtin chipset frame buffer device
11 * - 03 Jan 95: Original version by Martin Schaller: The TT driver and
13 * - 09 Jan 95: Roman: I've added the hardware abstraction (hw_switch)
16 * - 07 May 95: Martin: Added colormap operations for the external driver
17 * - 21 May 95: Martin: Added support for overscan
19 * - Jul 95: Guenther Kelleter <guenther@pool.informatik.rwth-aachen.de>:
23 * - 27 Dec 95: Guenther: Implemented user definable video modes "user[0-7]"
25 * "R<x>;<y>;<depth>". (Makes sense only on Falcon)
28 * - 23 Sep 97: Juergen: added xres_virtual for cards like ProMST
29 * The external-part is legacy, therefore hardware-specific
[all …]
/linux/drivers/media/usb/gspca/
H A Dspca508.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2009 Jean-Francois Moine <http://moinejf.free.fr>
58 * Initialization data: this is the first set-up data written to the
67 /* READ {0x0000, 0x8114} -> 0000: 00 */
79 /* --------------------------------------- */
82 /* --------------------------------------- */
91 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
92 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
96 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
97 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
[all …]
/linux/drivers/tty/serial/
H A Dserial_core.c1 // SPDX-License-Identifier: GPL-2.0+
8 * Copyright (C) 2000-2001 Deep Blue Solutions Ltd.
43 * lockdep: port->lock is initialized in two places, but we
44 * want only one lock-class:
48 #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
62 return !!(uport->status & UPSTAT_DCD_ENABLE); in uart_dcd_enabled()
67 if (atomic_add_unless(&state->refcount, 1, 0)) in uart_port_ref()
68 return state->uart_port; in uart_port_ref()
74 if (atomic_dec_and_test(&uport->state->refcount)) in uart_port_deref()
75 wake_up(&uport->state->remove_wait); in uart_port_deref()
[all …]

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