| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | imx7d-clock.yaml | 39 - const: ckil
62 clocks = <&ckil>, <&osc>;
63 clock-names = "ckil", "osc";
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| H A D | imx6ul-clock.yaml | 40 - const: ckil
66 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
67 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
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| H A D | imx6sll-clock.yaml | 40 - const: ckil
66 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
67 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
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| H A D | imx6sx-clock.yaml | 42 - const: ckil
70 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>, <&anaclk1>, <&anaclk2>;
71 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "anaclk1", "anaclk2";
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| H A D | imx8m-clock.yaml | 72 - const: ckil
119 clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>,
121 clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1",
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| H A D | imx6q-clock.yaml | 42 - const: ckil
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| H A D | imx31-clock.yaml | 21 ckil 2
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| /linux/drivers/clk/imx/ |
| H A D | clk-imx31.c | 39 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator
57 clk[ckil] = imx_clk_fixed("ckil", 32768); in _mx31_clocks_init()
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| H A D | clk-imx27.c | 38 "ckil", "fpm", "ckih_gate", "ckih_gate",
57 clk[IMX27_CLK_CKIL] = imx_clk_fixed("ckil", 32768); in _mx27_clocks_init()
58 clk[IMX27_CLK_FPM] = imx_clk_fixed_factor("fpm", "ckil", 1024, 1); in _mx27_clocks_init()
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| H A D | clk-imx35.c | 79 /* 81 */ gpu2d_gate, ckil, clk_max enumerator
107 clk[ckil] = imx_clk_fixed("ckil", 32768); in _mx35_clocks_init()
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| H A D | clk-imx8mq.c | 271 "sys3_pll_out", "audio_pll1_out", "video_pll1_out", "ckil", };
273 static const char * const pllout_monitor_sels[] = {"osc_25m", "osc_27m", "dummy", "dummy", "ckil",
299 hws[IMX8MQ_CLK_32K] = imx_get_clk_hw_by_name(np, "ckil"); in imx8mq_clocks_probe()
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| H A D | clk-imx5.c | 101 "ipg", "per_root", "ckil", "dummy",};
134 clk[IMX5_CLK_CKIL] = imx_obtain_fixed_clock("ckil", 0); in mx5_clocks_common_init()
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| H A D | clk-imx6ul.c | 65 "dummy", "lcdif_pix", "ahb", "ipg", "ipg_per", "ckil", "pll4_audio_div", };
143 hws[IMX6UL_CLK_CKIL] = imx_get_clk_hw_by_name(ccm_node, "ckil"); in imx6ul_clocks_init()
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| H A D | clk-imx6sx.c | 61 "lcdif1_pix", "ahb", "ipg", "perclk", "ckil", "pll4_audio_div",
136 hws[IMX6SX_CLK_CKIL] = imx_get_clk_hw_by_name(ccm_node, "ckil"); in imx6sx_clocks_init()
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| H A D | clk-imx6q.c | 66 "ipu2_di1", "ahb", "ipg", "ipg_per", "ckil", "pll4_audio_div", };
452 hws[IMX6QDL_CLK_CKIL] = imx6q_obtain_fixed_clk_hw(ccm_node, "ckil", 0); in imx6q_clocks_init()
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| H A D | clk-imx7d.c | 358 "pll_audio_post_div", "pll_video_post_div", "ckil", };
395 hws[IMX7D_CKIL] = imx_get_clk_hw_by_name(ccm_node, "ckil"); in imx7d_clocks_init()
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| H A D | clk-imx6sll.c | 94 hws[IMX6SLL_CLK_CKIL] = imx_get_clk_hw_by_name(ccm_node, "ckil"); in imx6sll_clocks_init()
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| H A D | clk-imx6sl.c | 197 hws[IMX6SL_CLK_CKIL] = imx_obtain_fixed_clock_hw("ckil", 0); in imx6sl_clocks_init()
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| /linux/drivers/rtc/ |
| H A D | rtc-mxc_v2.c | 49 * To take care of the asynchronous CKIL clock, all writes from the IP domain
50 * will be synchronized to the CKIL domain.
57 /* Wait for 3 CKIL cycles */ in mxc_rtc_sync_lp_locked()
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| H A D | rtc-snvs.c | 120 /* Wait for 3 CKIL cycles, about 61.0-91.5 µs */ in rtc_write_sync_lp()
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx6ul-prti6g.dts | 65 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>, <&clock_ksz8081_out>;
66 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "enet1_ref_pad";
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| H A D | imx7s.dtsi | 98 ckil: clock-cki { label
102 clock-output-names = "ckil";
666 clocks = <&ckil>, <&osc>;
667 clock-names = "ckil", "osc";
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| H A D | imx6qdl.dtsi | 57 ckil {
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