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/freebsd/sys/contrib/device-tree/Bindings/iio/frequency/
H A Dadf4350.txt4 - compatible: Should be one of
7 - reg: SPI chip select numbert for the device
8 - spi-max-frequency: Max SPI frequency to use (< 20000000)
9 - clocks: From common clock binding. Clock is phandle to clock for
13 - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number,
15 - adi,channel-spacing: Channel spacing in Hz (influences MODULUS).
16 - adi,power-up-frequency: If set in Hz the PLL tunes to
18 - adi,reference-div-factor: If set the driver skips dynamic calculation
20 - adi,reference-doubler-enable: Enables reference doubler.
21 - adi,reference-div2-enable: Enables reference divider.
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H A Dadi,adf4350.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
28 clock-names:
31 '#clock-cells':
34 clock-output-names:
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/freebsd/sys/contrib/device-tree/Bindings/leds/
H A Dleds-lp55xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lp55xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
27 - national,lp5521
28 - national,lp5523
29 - ti,lp55231
30 - ti,lp5562
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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dcs42l52.txt5 - compatible : "cirrus,cs42l52"
7 - reg : the I2C address of the device for I2C
11 - cirrus,reset-gpio : GPIO controller's phandle and the number
14 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
21 - cirrus,mica-differential-cfg : boolean, If present, then the MICA input is configured
23 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
25 - cirrus,micb-differential-cfg : boolean, If present, then the MICB input is configured
27 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
29 - cirrus,micbias-lvl: Set the output voltage level on the MICBIAS Pin
42 reset-gpio = <&gpio 10 0>;
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H A Dcs42l56.txt5 - compatible : "cirrus,cs42l56"
7 - reg : the I2C address of the device for I2C
9 - VA-supply, VCP-supply, VLDO-supply : power supplies for the device,
14 - cirrus,gpio-nreset : GPIO controller's phandle and the number
17 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
24 - cirrus,ain1a-ref-cfg, ain1b-ref-cfg : boolean, If present, AIN1A or AIN1B are configured
25 as a pseudo-differential input referenced to AIN1REF/AIN3A.
27 - cirrus,ain2a-ref-cfg, ain2b-ref-cfg : boolean, If present, AIN2A or AIN2B are configured
28 as a pseudo-differential input referenced to AIN2REF/AIN3B.
30 - cirrus,micbias-lvl: Set the output voltage level on the MICBIAS Pin.
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H A Dwlf,wm8962.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Wolfson WM8962 Ultra-Low Power Stereo CODEC
10 - patches@opensource.cirrus.com
13 - $ref: dai-common.yaml#
28 "#sound-dai-cells":
31 AVDD-supply:
34 CPVDD-supply:
35 description: Charge pump power supply.
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/freebsd/sys/contrib/device-tree/Bindings/iio/addac/
H A Dadi,ad74115.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd/tools/tools/netmap/
H A Dnmreplay.832 .Bk -words
33 .Bl -tag -width "nmreplay"
35 .Op Fl f Ar pcap-file
36 .Op Fl i Ar netmap-interface
41 .Op Fl w Ar wait-link
43 .Op Fl C Ar cpu-placement
55 is computed ahead of time, and the thread in charge of transmission
56 only has to pump data through the interface.
61 .Bl -tag -width Ds
62 .It Fl f Ar pcap-file
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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dqcom-rpm.txt8 - compatible:
12 "qcom,rpm-apq8064"
13 "qcom,rpm-msm8660"
14 "qcom,rpm-msm8960"
15 "qcom,rpm-ipq8064"
16 "qcom,rpm-mdm9615"
18 - reg:
20 Value type: <prop-encoded-array>
23 - interrupts:
25 Value type: <prop-encoded-array>
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/freebsd/sys/dev/firmware/xilinx/
H A Dpm_defs.h2 * Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved.
4 * SPDX-License-Identifier: BSD-3-Clause
329 * @PM_PLL_PARAM_POST_SRC: Clock source for PLL Bypass mode
333 * @PM_PLL_PARAM_CP: PLL charge pump control
352 * @PM_PLL_MODE_INTEGER: PLL is locked in integer mode
353 * @PM_PLL_MODE_FRACTIONAL: PLL is locked in fractional mode
/freebsd/share/dict/
H A Dweb2a12 A-b-c book
13 A-b-c method
14 abdomino-uterotomy
15 Abdul-baha
16 a-be
20 able-bodied
21 able-bodiedness
22 able-minded
23 able-mindedness
27 Abor-miri
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H A Dweb233754 charge
99810 Jean-Christophe
99811 Jean-Pierre
117962 mode
160079 pump
/freebsd/sys/dev/hifn/
H A Dhifn7751reg.h3 /*-
4 * SPDX-License-Identifier: BSD-3-Clause
9 * Copyright (c) 2000-2001 Network Security Technologies, Inc.
12 * Please send any comments, feedback, bug-fixes, or feature requests to
41 * Materiel Command, USAF, under agreement number F30602-01-2-0537.
77 * The values below should multiple of 4 -- and be large enough to handle
81 * mac-key + rc4-key
162 #define HIFN_PUCNFG_BIGENDIAN 0x0080 /* DMA big endian mode */
230 #define HIFN_1_PUB_OPLEN 0x304 /* 7951-compat Public Operand Length */
231 #define HIFN_1_PUB_OP 0x308 /* 7951-compat Public Operand */
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/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra30-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
16 nvidia,hpd-gpio =
18 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
19 vdd-supply = <&reg_3v3_avdd_hdmi>;
24 lan-reset-
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H A Dtegra30-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
16 avdd-pexa-supply = <&vdd2_reg>;
17 avdd-pexb-supply = <&vdd2_reg>;
18 avdd-pex-pll-suppl
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H A Dtegra30-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 avdd-pexa-supply = <&vdd2_reg>;
16 avdd-pexb-supply = <&vdd2_reg>;
17 avdd-pex-pll-suppl
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/freebsd/contrib/pam_modules/pam_passwdqc/
H A Dwordset_4k.c6 * I've replaced two 7-character words to save space.
830 "charge",
2382 "mode",
2843 "pump",
/freebsd/share/misc/
H A Dusb_vendors6 # http://www.linux-usb.org/usb-ids.html
7 # or send entries as patches (diff -u old new) in the
10 # http://www.linux-usb.org/usb.ids
13 # Date: 2025-04-01 20:34:02
20 # device device_name <-- single tab
21 # interface interface_name <-- two tabs
38 5301 GW-US54ZGL 802.11bg
54 145f NW-3100 802.11b/g 54Mbps Wireless Network Adapter [zd1211]
62 0200 TP-Link
81 120e ASI120MC-S Planetary Camera
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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_reset.c121 ahp->ah_hwp = HAL_TRUE_CHIP; in ar9300_attach_hw_platform()
196 * Mask used to construct AAD for CCMP-AES in ar9300_init_mfp()
197 * Cisco spec defined bits 0-3 as mask in ar9300_init_mfp()
226 centers->ctl_center = centers->ext_center = in ar9300_get_channel_centers()
227 centers->synth_center = ichan->channel; in ar9300_get_channel_centers()
234 * In 20/40 phy mode, the center frequency is in ar9300_get_channel_centers()
238 centers->synth_center = ichan->channel + HT40_CHANNEL_CENTER_SHIFT; in ar9300_get_channel_centers()
241 centers->synth_center = ichan->channel - HT40_CHANNEL_CENTER_SHIFT; in ar9300_get_channel_centers()
242 extoff = -1; in ar9300_get_channel_centers()
245 centers->ctl_center = in ar9300_get_channel_centers()
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/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
52 … 0x001d10UL //Access:RW DataWidth:0x1 // Disable rasdp error mode check
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
116 … (0x1<<9) // Fast back-to-back transaction ena…
128 … (0x1<<23) // Fast back-to-back capable. Not ap…
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