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/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_debugfs.c4 * Permission is hereby granted, free of charge, to any person obtaining
40 struct drm_info_node *node = (struct drm_info_node *) m->private; in nouveau_debugfs_vbios_image()
41 struct nouveau_drm *drm = nouveau_drm(node->minor->dev); in nouveau_debugfs_vbios_image()
44 for (i = 0; i < drm->vbios.length; i++) in nouveau_debugfs_vbios_image()
45 seq_printf(m, "%c", drm->vbios.data[i]); in nouveau_debugfs_vbios_image()
52 struct drm_info_node *node = m->private; in nouveau_debugfs_strap_peek()
53 struct nouveau_drm *drm = nouveau_drm(node->minor->dev); in nouveau_debugfs_strap_peek()
56 ret = pm_runtime_get_sync(drm->dev->dev); in nouveau_debugfs_strap_peek()
57 if (ret < 0 && ret != -EACCES) { in nouveau_debugfs_strap_peek()
58 pm_runtime_put_autosuspend(drm->dev->dev); in nouveau_debugfs_strap_peek()
[all …]
/linux/drivers/rtc/
H A Drtc-ds1305.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rtc-ds1305.c -- driver for DS1305 and DS1306 SPI RTC chips
21 * otherwise you're reading it. All non-bitmask values are BCD.
27 * - Need fancy "hours" encoding in 12hour mode
28 * - Don't rely on the "day-of-week" field (or tm_wday)
29 * - Are a 21st-century clock (2000 <= year < 2100)
50 * NOTE ALSO that while we could generate once-a-second IRQs (UIE), we
94 u8 ctrl[DS1305_CONTROL_LEN]; member
98 /*----------------------------------------------------------------------*/
101 * Utilities ... tolerate 12-hour AM/PM notation in case of non-Linux
[all …]
/linux/drivers/mfd/
H A Dtwl-core.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * twl_core.c - driver for TWL4030/TWL5030/TWL60X0/TPS659x0 PM
6 * Copyright (C) 2005-2006 Texas Instruments, Inc.
39 #include <linux/mfd/twl4030-audio.h>
41 #include "twl-core.h"
44 * The TWL4030 "Triton 2" is one of a family of a multi-function "Power
62 /* subchip/slave 0 - USB ID */
65 /* subchip/slave 1 - AUD ID */
72 /* subchip/slave 2 - AUX ID */
81 #define TWL5031_BASEADD_ACCESSORY 0x0074 /* Replaces Main Charge */
[all …]
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qusb2.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/nvmem-consumer.h>
22 #include <dt-bindings/phy/phy-qcom-qusb2.h>
105 * if yes, then offset gives index in the reg-layout
123 /* set of registers with offsets different per-PHY */
301 /* true if TUNE1 register must be updated by fused value, else TUNE2 */
307 /* true if PHY default clk scheme is single-ended */
397 "vdd", "vdda-pll", "vdda-phy-dpdm",
402 /* struct override_param - structure holding qusb2 v2 phy overriding param
404 * to value
[all …]
/linux/Documentation/admin-guide/
H A Dcgroup-v2.rst1 .. _cgroup-v2:
11 conventions of cgroup v2. It describes all userland-visible aspects
14 v1 is available under :ref:`Documentation/admin-guide/cgroup-v1/index.rst <cgroup-v1>`.
22 1-1. Terminology
23 1-2. What is cgroup?
25 2-1. Mounting
26 2-2. Organizing Processes and Threads
27 2-2-1. Processes
28 2-2-2. Threads
29 2-3. [Un]populated Notification
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32f429-disco.dts2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
26 * b) Permission is hereby granted, free of charge, to any person
48 /dts-v1/;
50 #include "stm32f429-pinctrl.dtsi"
51 #include <dt-bindings/input/input.h>
52 #include <dt-bindings/interrupt-controller/irq.h>
53 #include <dt-bindings/gpio/gpio.h>
56 model = "STMicroelectronics STM32F429i-DISCO board";
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/linux/include/uapi/rdma/hfi/
H A Dhfi1_user.h1 /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
9 * Copyright(c) 2015 - 2020 Intel Corporation.
28 * - Redistributions of source code must retain the above copyright
30 * - Redistributions in binary form must reproduce the above copyright
34 * - Neither the name of Intel Corporation nor the names of its
93 #define HFI1_CAP_DMA_RTAIL (1UL << 0) /* Use DMA'ed RTail value */
100 #define HFI1_CAP_MULTI_PKT_EGR (1UL << 7) /* Enable multi-packet Egr buffs*/
134 * These are the status bits readable (in ASCII form, 64bit value)
178 * Device status and notifications from driver to user-space.
200 * bits 0-3 - version (currently unused)
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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/
H A Dgsp.c4 * Permission is hereby granted, free of charge, to any person obtaining a
53 mutex_lock(&gsp->cmdq.mutex); in r535_gsp_msgq_work()
54 if (*gsp->msgq.rptr != *gsp->msgq.wptr) in r535_gsp_msgq_work()
56 mutex_unlock(&gsp->cmdq.mutex); in r535_gsp_msgq_work()
63 struct nvkm_subdev *subdev = &gsp->subdev; in r535_gsp_intr()
64 u32 intr = nvkm_falcon_rd32(&gsp->falcon, 0x0008); in r535_gsp_intr()
65 u32 inte = nvkm_falcon_rd32(&gsp->falcon, gsp->falcon.func->addr2 + in r535_gsp_intr()
66 gsp->falcon.func->riscv_irqmask); in r535_gsp_intr()
75 nvkm_falcon_wr32(&gsp->falcon, 0x004, 0x00000040); in r535_gsp_intr()
76 schedule_work(&gsp->msgq.work); in r535_gsp_intr()
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsc7180-idp.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
14 #include "sc7180-firmware-tfa.dtsi"
20 compatible = "qcom,sc7180-idp", "qcom,sc7180";
30 stdout-path = "serial0:115200n8";
42 /delete-node/ &gpu_zap_shader;
43 /delete-node/ &hyp_mem;
[all …]
H A Dsc7180-acer-aspire1.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/sound/qcom,q6asm.h>
7 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 /delete-node/ &tz_mem;
15 /delete-node/ &ipa_fw_mem;
20 chassis-type = "laptop";
30 stdout-path = "serial0:115200n8";
33 reserved-memory {
[all …]
H A Dsc7180-trogdor.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/sc7180-lpass.h>
16 #include "sc7180-firmware-tfa.dtsi"
22 thermal-zones {
23 charger_thermal: charger-thermal {
[all …]
/linux/drivers/media/i2c/
H A Dov2640.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Copyright 2005-2009 Freescale Semiconductor, Inc. All Rights Reserved.
20 #include <linux/v4l2-mediabus.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-event.h>
25 #include <media/v4l2-subdev.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-image-sizes.h>
161 #define GAIN 0x00 /* AGC - Gain control gain setting */
176 #define REG08 0x08 /* Frame Exposure One-pin Control Pre-charge Row Num */
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/linux/drivers/net/xen-netback/
H A Dcommon.h8 * Permission is hereby granted, free of charge, to any person obtaining a copy
59 * skb_shinfo(skb)->destructor_arg points to the first mapped slot's
81 /* Discriminate from any valid pending_idx value. */
91 #define NETBACK_INVALID_HANDLE -1
94 * the maximum slots a valid packet can use. Now this value is defined
100 /* Queue name is interface name with "-qNNN" appended */
103 /* IRQ name is queue name with "-tx" or "-rx" appended */
109 /* Stats fields to be updated per-queue.
135 struct xenvif_queue { /* Per-queue data for xenvif */
136 unsigned int id; /* Queue ID, 0-based */
[all …]
H A Dnetback.c2 * Back-end of the driver for virtual network devices. This portion of the
3 * driver exports a 'unified' network-device interface that can be accessed
5 * reference front-end implementation can be found in:
6 * drivers/net/xen-netfront.c
8 * Copyright (c) 2002-2005, K A Fraser
16 * Permission is hereby granted, free of charge, to any person obtaining a copy
101 * for xen-netfront with the XDP_PACKET_HEADROOM offset
122 return page_to_pfn(queue->mmap_pages[idx]); in idx_to_pfn()
132 (vif->pending_tx_info[pending_idx].callback_struct)
138 u16 pending_idx = ubuf->desc; in ubuf_to_queue()
[all …]
/linux/drivers/char/agp/
H A Dgeneric.c4 * Copyright (C) 2002-2005 Dave Jones.
9 * Permission is hereby granted, free of charge, to any person obtaining a
28 * - Allocate more than order 0 pages to avoid too much linear map splitting.
37 #include <linux/dma-mapping.h>
57 * Generic routines for handling agp_memory structures -
67 clear_bit(key, agp_bridge->key_list); in agp_free_key()
76 bit = find_first_zero_bit(agp_bridge->key_list, MAXKEY); in agp_get_key()
78 set_bit(bit, agp_bridge->key_list); in agp_get_key()
81 return -1; in agp_get_key()
92 mem->pages = kvmalloc(size, GFP_KERNEL); in agp_alloc_page_array()
[all …]
/linux/drivers/platform/x86/x86-android-tablets/
H A Dlenovo.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright (C) 2021-2023 Hans de Goede <hansg@kernel.org>
16 #include <linux/input-event-codes.h>
29 #include "shared-psy-info.h"
30 #include "x86-android-tablets.h"
35 * The Android kernels have a hack in the i915 driver to write a non-standard
36 * panel specific DSI register to set the duty-cycle of the LCD's PWM output.
48 * But on some models the panel's PWM output defaults to a duty-cycle of
75 PROPERTY_ENTRY_GPIO("reset-gpios", &cherryview_gpiochip_nodes[1], 53, GPIO_ACTIVE_HIGH),
76 PROPERTY_ENTRY_GPIO("irq-gpios", &cherryview_gpiochip_nodes[1], 56, GPIO_ACTIVE_HIGH),
[all …]
/linux/drivers/video/fbdev/
H A Dimsttfb.c2 * drivers/video/imsttfb.c -- frame buffer device for IMS TwinTurbo
40 #define eieio() /* Enforce In-order Execution of I/O */
135 * c is charge pump bias which depends on the VCO frequency
172 TVPPMASK = 0x08, /* 2 Pixel Read-Mask */
182 TVPCXPOL = 0x30, /* 12 Cursor-Position X LSB */
183 TVPCXPOH = 0x34, /* 13 Cursor-Position X MSB */
184 TVPCYPOL = 0x38, /* 14 Cursor-Position Y LSB */
185 TVPCYPOH = 0x3c, /* 15 Cursor-Position Y MSB */
204 TVPIRCKL = 0x30, /* Color-Key Overlay Low */
205 TVPIRCKH = 0x31, /* Color-Key Overlay High */
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/
H A Dhub.fuc5 * Permission is hereby granted, free of charge, to any person obtaining a
91 mov $r2 0x2003 // { HUB_CHSW_PULSE, ZERO } -> intr 8
98 mov $r2 0x2004 // { 0x04, ZERO } -> intr 9
100 mov $r2 0x200b // { HUB_FIRMWARE_MTHD, ZERO } -> intr 10
102 mov $r2 0x200c // { 0x0c, ZERO } -> intr 15
189 call(nv_wr32) // CTRL
411 // In: $r15 value to set 0x404170 to
426 // Disables various things, waits a bit, and re-enables them..
447 // Not a clue what this is for, except that unless the value is 0x10, the
450 // In: $r15 value to set to (0x00/0x10 are used)
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramgt215.c4 * Permission is hereby granted, free of charge, to any person obtaining a
120 hi--; in gt215_link_train_calc()
125 median[i] = ((hi - lo) >> 1) + lo; in gt215_link_train_calc()
130 /* Find the best value for 0x1111e0 */ in gt215_link_train_calc()
138 train->r_100720 = 0; in gt215_link_train_calc()
143 train->r_100720 |= ((median[i] & 0x0f) << (i << 2)); in gt215_link_train_calc()
146 train->r_1111e0 = 0x02000000 | (bin * 0x101); in gt215_link_train_calc()
147 train->r_111400 = 0x0; in gt215_link_train_calc()
156 struct gt215_ltrain *train = &ram->ltrain; in gt215_link_train()
157 struct gt215_ramfuc *fuc = &ram->fuc; in gt215_link_train()
[all …]
/linux/drivers/media/usb/gspca/
H A Dspca508.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2009 Jean-Francois Moine <http://moinejf.free.fr>
58 * Initialization data: this is the first set-up data written to the
67 /* READ {0x0000, 0x8114} -> 0000: 00 */
69 {0x0008, 0x8110}, /* Enable charge pump output */
75 /* Enable charge pump output, sync.serial,external 2x clock */
79 /* --------------------------------------- */
82 /* --------------------------------------- */
91 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
92 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
[all …]
/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu14_driver_if_v14_0.h4 * Permission is hereby granted, free of charge, to any person obtaining a
517 uint8_t SnapToDiscrete; // 0 - Fine grained DPM, 1 - Discrete DPM
520 LinearInt_t ConversionToAvfsClk; // Transfer function to AVFS Clock (GHz->GHz)
853 //Full Ctrl
1053 …Version; // should be unique to each SKU(i.e if any value changes in below structure then this val…
1087 …GfxApccPlusResidencyLimit; // Percentage value. Used by APCC+ controller to control PCC residency …
1106 …uint16_t Vmin_Hot_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1107 …uint16_t Vmin_Cold_T0[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) Initial (pre-aging) Vse…
1108 …uint16_t Vmin_Hot_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
1109 …uint16_t Vmin_Cold_Eol[PMFW_VOLT_PLANE_COUNT]; //In mV(Q2) End-of-life Vset to be …
[all …]
/linux/drivers/mtd/nand/raw/
H A Darasan-nand-controller.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014 - 2020 Xilinx, Inc.
17 #include <linux/dma-mapping.h>
114 #define ANFC_MAX_PKT_SIZE (SZ_2K - 1)
124 * struct anfc_op - Defines how to execute an operation
150 * struct anand - Defines the NAND chip related information
153 * @rb: Ready-busy line
154 * @page_sz: Register value of the page_sz field to use
157 * @timings: NV-DDR specific timings to use
158 * @ecc_conf: Hardware ECC configuration value
[all …]
/linux/drivers/media/usb/pvrusb2/
H A Dpvrusb2-hdw.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <media/v4l2-common.h>
16 #include "pvrusb2-std.h"
17 #include "pvrusb2-util.h"
18 #include "pvrusb2-hdw.h"
19 #include "pvrusb2-i2c-cor
2809 struct v4l2_control ctrl; pvr2_subdev_set_control() local
2977 int value; pvr2_hdw_commit_setup() local
[all...]
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
16 nvidia,hpd-gpio =
18 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
19 vdd-supply = <&reg_3v3_avdd_hdmi>;
24 lan-reset-n-hog {
25 gpio-hog;
27 output-high;
28 line-name = "LAN_RESET#";
33 pinctrl-names = "default";
[all …]
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega10_powertune.c4 * Permission is hereby granted, free of charge, to any person obtaining a
34 …--------------------------------------------------------------------------------------------------…
35 … Shift Value
36 …--------------------------------------------------------------------------------------------------…
58 …--------------------------------------------------------------------------------------------------…
59 … Shift Value
60 …--------------------------------------------------------------------------------------------------…
122 …--------------------------------------------------------------------------------------------------…
123 … Shift Value
124 …--------------------------------------------------------------------------------------------------…
[all …]

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