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/linux/drivers/net/wwan/iosm/
H A Diosm_ipc_imem_ops.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-21 Intel Corporation.
15 /* Open a packet data online channel between the network layer and CP. */
18 dev_dbg(ipc_imem->dev, "%s if id: %d", in ipc_imem_sys_wwan_open()
19 ipc_imem_phase_get_string(ipc_imem->phase), if_id); in ipc_imem_sys_wwan_open()
21 /* The network interface is only supported in the runtime phase. */ in ipc_imem_sys_wwan_open()
23 dev_err(ipc_imem->dev, "net:%d : refused phase %s", if_id, in ipc_imem_sys_wwan_open()
24 ipc_imem_phase_get_string(ipc_imem->phase)); in ipc_imem_sys_wwan_open()
25 return -EIO; in ipc_imem_sys_wwan_open()
28 return ipc_mux_open_session(ipc_imem->mux, if_id); in ipc_imem_sys_wwan_open()
[all …]
H A Diosm_ipc_imem.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-21 Intel Corporation.
16 /* Check the wwan ips if it is valid with Channel as input. */
20 return chnl->ctype == IPC_CTYPE_WWAN && in ipc_imem_check_wwan_ips()
21 chnl->if_id == IPC_MEM_MUX_IP_CH_IF_ID; in ipc_imem_check_wwan_ips()
32 ipc_imem->device_sleep = state; in ipc_imem_msg_send_device_sleep()
34 return ipc_protocol_tq_msg_send(ipc_imem->ipc_protocol, in ipc_imem_msg_send_device_sleep()
42 if (pipe->nr_of_queued_entries >= pipe->max_nr_of_queued_entries) in ipc_imem_dl_skb_alloc()
45 return ipc_protocol_dl_td_prepare(ipc_imem->ipc_protocol, pipe); in ipc_imem_dl_skb_alloc()
59 struct ipc_pipe *pipe = &ipc_imem->channels[i].dl_pipe; in ipc_imem_tq_td_alloc_timer()
[all …]
H A Diosm_ipc_imem.h1 /* SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-21 Intel Corporation.
70 #define IMEM_IRQ_DONT_CARE (-1)
88 * Modem crash notification configuration. If this value is non-zero then
91 * will use out-of-band method to notify about it's Crash.
100 #define IPC_CB(skb) ((struct ipc_skb_cb *)((skb)->cb))
135 /* Enum defining channel states. */
144 * enum ipc_ctype - Enum defining supported channel type needed for control
175 * struct ipc_pipe - Structure for Pipe.
177 * @channel: Id of the sio device, set by imem_sio_open,
[all …]
/linux/include/linux/regulator/
H A Dda9121.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * DA9121 Single-channel dual-phase 10A buck converter
4 * DA9130 Single-channel dual-phase 10A buck converter (Automotive)
5 * DA9217 Single-channel dual-phase 6A buck converter
6 * DA9122 Dual-channel single-phase 5A buck converter
7 * DA9131 Dual-channel single-phase 5A buck converter (Automotive)
8 * DA9220 Dual-channel single-phase 3A buck converter
9 * DA9132 Dual-channel single-phase 3A buck converter (Automotive)
/linux/Documentation/devicetree/bindings/
H A Dtrivial-devices.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
27 spi-max-frequency: true
32 - enum:
34 - acbel,fsg032
35 … # SMBus/I2C Digital Temperature Sensor in 6-Pin SOT with SMBus Alert and Over Temperature Pin
36 - ad,ad7414 # Deprecated, use adi,ad7414
[all …]
/linux/Documentation/devicetree/bindings/regulator/
H A Ddlg,da9121.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Adam Ward <Adam.Ward.opensource@diasemi.com>
13 Dialog Semiconductor DA9121 Single-channel 10A double-phase buck converter
14 Dialog Semiconductor DA9122 Double-channel 5A single-phase buck converter
15 Dialog Semiconductor DA9220 Double-channel 3A single-phase buck converter
16 Dialog Semiconductor DA9217 Single-channel 6A double-phase buck converter
17 Dialog Semiconductor DA9130 Single-channel 10A double-phase buck converter
18 Dialog Semiconductor DA9131 Double-channel 5A single-phase buck converter
[all …]
/linux/drivers/regulator/
H A Dda9121-regulator.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * DA9121 Single-channel dual-phase 10A buck converter
4 * DA9130 Single-channel dual-phase 10A buck converter (Automotive)
5 * DA9217 Single-channel dual-phase 6A buck converter
6 * DA9122 Dual-channel single-phase 5A buck converter
7 * DA9131 Dual-channel single-phase 5A buck converter (Automotive)
8 * DA9220 Dual-channel single-phase 3A buck converter
9 * DA9132 Dual-channel single-phase 3A buck converter (Automotive)
23 #include <dt-bindings/regulator/dlg,da9121-regulator.h>
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
38 managed regulators and simple non-configurable regulators.
64 the netlink mechanism. User-space applications can subscribe to these events
65 for real-time updates on various regulator events.
75 They provide two I2C-controlled DC/DC step-down converters with
101 tristate "Active-semi act8865 voltage regulator"
106 This driver controls a active-semi act8865 voltage output
110 tristate "Active-semi ACT8945A voltage regulator"
113 This driver controls a active-semi ACT8945A voltage regulator
114 via I2C bus. The ACT8945A features three step-down DC/DC converters
[all …]
/linux/Documentation/devicetree/bindings/iio/dac/
H A Dadi,ad5755.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD5755 Multi-Channel DAC
10 - Sean Nyekjaer <sean.nyekjaer@prevas.dk>
15 - adi,ad5755
16 - adi,ad5755-1
17 - adi,ad5757
18 - adi,ad5735
19 - adi,ad5737
[all …]
/linux/drivers/parport/
H A Dieee1284_ops.c1 // SPDX-License-Identifier: GPL-2.0
2 /* IEEE-1284 operations for parport.
5 * they are used by the low-level drivers. If they have a special way
7 * the function pointers in port->ops); if not, they can just use these
31 * One-way data transfer functions. *
43 struct pardevice *dev = port->physport->cad; in parport_ieee1284_write_compat()
47 if (port->irq != PARPORT_IRQ_NONE) { in parport_ieee1284_write_compat()
52 port->physport->ieee1284.phase = IEEE1284_PH_FWD_DATA; in parport_ieee1284_write_compat()
56 unsigned long expire = jiffies + dev->timeout; in parport_ieee1284_write_compat()
112 pr_debug("%s: Timed out\n", port->name); in parport_ieee1284_write_compat()
[all …]
/linux/Documentation/devicetree/bindings/iio/proximity/
H A Dsemtech,sx9324.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gwendal Grignou <gwendal@chromium.org>
11 - Daniel Campello <campello@chromium.org>
17 - $ref: /schemas/iio/iio.yaml#
32 vdd-supply:
35 svdd-supply:
38 "#io-channel-cells":
41 semtech,ph0-pin:
[all …]
/linux/drivers/char/ipmi/
H A Dkcs_bmc_cdev_ipmi.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015-2018, Intel Corporation.
6 #define pr_fmt(fmt) "kcs-bmc: " fmt
60 /* IPMI 2.0 - Table 9-4, KCS Interface Status Codes */
76 enum kcs_ipmi_phases phase; member
94 #define DEVICE_NAME "ipmi-kcs"
100 /* IPMI 2.0 - Table 9-1, KCS Interface Status Register Bits */
108 /* IPMI 2.0 - Table 9-2, KCS Interface State Bits */
116 /* IPMI 2.0 - Table 9-3, KCS Interface Control Codes */
124 kcs_bmc_update_status(priv->client.dev, KCS_STATUS_STATE_MASK, KCS_STATUS_STATE(state)); in set_state()
[all …]
/linux/drivers/iio/dac/
H A Dadi-axi-dac.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright 2016-2024 Analog Devices Inc.
26 #include <linux/fpga/adi-axi-common.h>
28 #include <linux/iio/buffer-dmaengine.h>
52 /* DAC Channel controls */
91 guard(mutex)(&st->lock); in axi_dac_enable()
92 ret = regmap_set_bits(st->regmap, AXI_DAC_REG_RSTN, in axi_dac_enable()
101 ret = regmap_read_poll_timeout(st->regmap, AXI_DAC_DRP_STATUS, __val, in axi_dac_enable()
106 return regmap_set_bits(st->regmap, AXI_DAC_REG_RSTN, in axi_dac_enable()
114 guard(mutex)(&st->lock); in axi_dac_disable()
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dlantiq,pef2256.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
20 - const: lantiq,pef2256
27 - description: Master Clock
28 - description: System Clock Receive
29 - description: System Clock Transmit
31 clock-names:
33 - const: mclk
[all …]
/linux/Documentation/hwmon/
H A Dtps53679.rst10 Addresses scanned: -
18 Addresses scanned: -
26 Addresses scanned: -
34 Addresses scanned: -
42 Addresses scanned: -
50 Addresses scanned: -
57 Guenter Roeck <linux@roeck-us.net>
61 -----------
63 Chips in this series are multi-phase step-down converters with one or two
64 output channels and up to 8 phases per channel.
[all …]
/linux/drivers/iio/proximity/
H A Dsx_common.h1 /* SPDX-License-Identifier: GPL-2.0 */
63 * Each phase presented by the sensor is an IIO channel..
65 * @mask_enable_chan: Mask over the channels bits in the enable channel
67 * @stat_offset: Offset to check phase status.
101 * @mutex: Serialize access to registers and channel configuration.
106 * @chan_prox_stat: Last reading of the proximity status for each channel.
111 * @chan_read: Bit field for each raw channel enabled.
156 /* 3 is the number of events defined by a single phase. */
/linux/drivers/ptp/
H A Dptp_idt82p33.h1 /* SPDX-License-Identifier: GPL-2.0+ */
46 * @brief Maximum absolute value for write phase offset in nanoseconds
50 /** @brief Phase offset resolution
52 * DPLL phase offset = 10^15 fs / ( System Clock * 2^13)
64 /* Workaround for TOD-to-output alignment issue */
87 struct idt82p33_channel channel[MAX_PHC_PLL]; member
94 /* Remember the ptp channel to report extts */
/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,adf4350.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
28 clock-names:
31 '#clock-cells':
34 clock-output-names:
[all …]
/linux/drivers/media/dvb-frontends/
H A Dtda8261.c1 // SPDX-License-Identifier: GPL-2.0-or-later
29 const struct tda8261_config *config = state->config; in tda8261_read()
31 struct i2c_msg msg = { .addr = config->addr, .flags = I2C_M_RD,.buf = buf, .len = 1 }; in tda8261_read()
33 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) in tda8261_read()
41 const struct tda8261_config *config = state->config; in tda8261_write()
43 struct i2c_msg msg = { .addr = config->addr, .flags = 0, .buf = buf, .len = 4 }; in tda8261_write()
45 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) in tda8261_write()
53 struct tda8261_state *state = fe->tuner_priv; in tda8261_get_status()
64 pr_debug("%s: Tuner Phase Locked\n", __func__); in tda8261_get_status()
76 struct tda8261_state *state = fe->tuner_priv; in tda8261_get_frequency()
[all …]
/linux/Documentation/devicetree/bindings/timer/
H A Drenesas,rz-mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/renesas,rz-mtu3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/G2L Multi-Function Timer Pulse Unit 3 (MTU3a)
10 - Biju Das <biju.das.jz@bp.renesas.com>
13 This hardware block consists of eight 16-bit timer channels and one
14 32-bit timer channel. It supports the following specifications:
15 - Pulse input/output: 28 lines max
16 - Pulse input 3 lines
[all …]
/linux/include/uapi/linux/
H A Dptp_clock.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * PTP 1588 clock support - user space interface
80 * struct ptp_clock_time - represents a time value
84 * included for sub-nanosecond resolution, should the demand for
101 /* Whether the clock supports precise system-device cross timestamps */
103 /* Whether the clock supports adjust phase */
105 int max_phase_adj; /* Maximum phase adjustment in nanoseconds. */
110 unsigned int index; /* Which channel to configure. */
123 * Phase offset. The signal should start toggling at an
128 struct ptp_clock_time phase; member
[all …]
/linux/drivers/staging/iio/Documentation/
H A Dsysfs-bus-iio-dds4 Contact: linux-iio@vger.kernel.org
15 Contact: linux-iio@vger.kernel.org
24 Contact: linux-iio@vger.kernel.org
34 Contact: linux-iio@vger.kernel.org
36 Stores phase into Y.
38 allows for pin controlled PSK Phase Shift Keying
40 control the desired phase Y which is added to the phase
45 Contact: linux-iio@vger.kernel.org
48 the desired value in rad. If shared across all phase registers
54 Contact: linux-iio@vger.kernel.org
[all …]
/linux/Documentation/input/devices/
H A Drotary-encoder.rst2 rotary-encoder - a generic driver for GPIO connected devices
8 --------
11 peripherals with two wires. The outputs are phase-shifted by 90 degrees
16 a stable state with both outputs high (half-period mode) and some have
17 a stable state in all steps (quarter-period mode).
19 The phase diagram of these two outputs look like this::
23 Channel A ____| |_____| |_____| |____
28 Channel B |_____| |_____| |_____| |__
33 |<-------->|
36 |<-->|
[all …]
/linux/sound/pci/ice1712/
H A Dwm8766.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright (c) 2012 Ondrej Zary <linux@rainbow-software.org>
16 /* low-level access */
21 wm->regs[addr] = data; in snd_wm8766_write()
22 wm->ops.write(wm, addr, data); in snd_wm8766_write()
27 static const DECLARE_TLV_DB_SCALE(wm8766_tlv, -12750, 50, 1);
31 .name = "Channel 1 Playback Volume",
42 .name = "Channel 2 Playback Volume",
53 .name = "Channel 3 Playback Volume",
64 .name = "Channel 1 Playback Switch",
[all …]
/linux/tools/testing/selftests/ptp/
H A Dtestptp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PTP 1588 clock support - User space test program
35 #define CLOCK_INVALID -1
113 return t->sec * NSEC_PER_SEC + t->nsec; in pctns()
120 " -c query the ptp clock's capabilities\n" in usage()
121 " -d name device to open\n" in usage()
122 " -e val read 'val' external time stamp events\n" in usage()
123 " -f val adjust the ptp clock frequency by 'val' ppb\n" in usage()
124 " -F chan Enable single channel mask and keep device open for debugfs verification.\n" in usage()
125 " -g get the ptp clock time\n" in usage()
[all …]

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