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/linux/drivers/char/xillybus/
H A Dxillybus_core.c1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <linux/dma-mapping.h>
75 * register_mutex is endpoint-specific, and is held when non-atomic
87 * wr_mutex -> rd_mutex -> register_mutex -> wr_spinlock -> rd_spinlock
101 dev_warn(endpoint->dev, in malformed_message()
102 "Malformed message (skipping): opcode=%d, channel=%03x, dir=%d, bufno=%03x, data=%07x\n", in malformed_message()
108 * which is the natural case MSI and several other hardware-oriented
120 struct xilly_channel *channel; in xillybus_isr() local
122 buf = ep->msgbuf_addr; in xillybus_isr()
123 buf_size = ep->msg_buf_size/sizeof(u32); in xillybus_isr()
[all …]
/linux/drivers/phy/renesas/
H A Dr8a779f0-ether-serdes.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2022-2025 Renesas Electronics Corporation
37 struct r8a779f0_eth_serdes_channel channel[R8A779F0_ETH_SERDES_NUM]; member
60 r8a779f0_eth_serdes_reg_wait(struct r8a779f0_eth_serdes_channel *channel, in r8a779f0_eth_serdes_reg_wait() argument
66 iowrite32(bank, channel->addr + R8A779F0_ETH_SERDES_BANK_SELECT); in r8a779f0_eth_serdes_reg_wait()
68 ret = readl_poll_timeout_atomic(channel->addr + offs, val, in r8a779f0_eth_serdes_reg_wait()
72 dev_dbg(&channel->phy->dev, in r8a779f0_eth_serdes_reg_wait()
74 __func__, channel->index, offs, bank, mask, expected); in r8a779f0_eth_serdes_reg_wait()
82 struct r8a779f0_eth_serdes_channel *channel; in r8a779f0_eth_serdes_common_init_ram() local
86 channel = &dd->channel[i]; in r8a779f0_eth_serdes_common_init_ram()
[all …]
/linux/drivers/staging/greybus/
H A Dlight.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/led-class-flash.h>
15 #include <media/v4l2-flash-led-class.h>
65 static void gb_lights_channel_free(struct gb_channel *channel);
67 static struct gb_connection *get_conn_from_channel(struct gb_channel *channel) in get_conn_from_channel() argument
69 return channel->light->glights->connection; in get_conn_from_channel()
74 return light->glights->connection; in get_conn_from_light()
77 static bool is_channel_flash(struct gb_channel *channel) in is_channel_flash() argument
79 return !!(channel->mode & (GB_CHANNEL_MODE_FLASH | GB_CHANNEL_MODE_TORCH in is_channel_flash()
90 static struct led_classdev *get_channel_cdev(struct gb_channel *channel) in get_channel_cdev() argument
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/linux/drivers/ipack/devices/
H A Dipoctal.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * driver for the GE IP-OCTAL boards
5 * Copyright (C) 2009-2012 CERN (www.cern.ch)
48 struct ipoctal_channel channel[NR_CHANNELS]; member
57 return container_of(chan, struct ipoctal, channel[index]); in chan_to_ipoctal()
60 static void ipoctal_reset_channel(struct ipoctal_channel *channel) in ipoctal_reset_channel() argument
62 iowrite8(CR_DISABLE_RX | CR_DISABLE_TX, &channel->regs->w.cr); in ipoctal_reset_channel()
63 channel->rx_enable = 0; in ipoctal_reset_channel()
64 iowrite8(CR_CMD_RESET_RX, &channel->regs->w.cr); in ipoctal_reset_channel()
65 iowrite8(CR_CMD_RESET_TX, &channel->regs->w.cr); in ipoctal_reset_channel()
[all …]
/linux/drivers/dma/sh/
H A Drz-dmac.c1 // SPDX-License-Identifier: GPL-2.0
5 * Based on imx-dma.c
9 * Copyright 2012 Javier Martin, Vista Silicon <javier.martin@vista-silicon.com>
13 #include <linux/dma-mapping.h>
17 #include <linux/irqchip/irq-renesas-rzv2h.h>
30 #include "../virt-dma.h"
117 * -----------------------------------------------------------------------------
183 * -----------------------------------------------------------------------------
190 writel(val, dmac->base + offset); in rz_dmac_writel()
196 writel(val, dmac->ext_base + offset); in rz_dmac_ext_writel()
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/linux/drivers/most/
H A Dmost_snd.c1 // SPDX-License-Identifier: GPL-2.0
3 * sound.c - Sound component for Mostcore
28 * struct channel - private structure to keep channel specific data
30 * @pcm_hardware: low-level hardware description
31 * @iface: interface for which the channel belongs to
32 * @cfg: channel configuration
35 * @id: channel index
42 * @copy_fn: copy function for PCM-specific format and width
44 struct channel { struct
93 while (i < bytes - 2) { in swap_copy24()
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/linux/drivers/hsi/clients/
H A Dhsi_char.c1 // SPDX-License-Identifier: GPL-2.0-only
66 * struct hsc_channel - hsi_char internal channel data
67 * @ch: channel number
68 * @flags: Keeps state of the channel (open/close, reading, writing)
92 * struct hsc_client_data - hsi_char internal client data
116 static void hsc_add_tail(struct hsc_channel *channel, struct hsi_msg *msg, in hsc_add_tail() argument
121 spin_lock_irqsave(&channel->lock, flags); in hsc_add_tail()
122 list_add_tail(&msg->link, queue); in hsc_add_tail()
123 spin_unlock_irqrestore(&channel->lock, flags); in hsc_add_tail()
126 static struct hsi_msg *hsc_get_first_msg(struct hsc_channel *channel, in hsc_get_first_msg() argument
[all …]
/linux/sound/xen/
H A Dxen_snd_front_evtchnl.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
4 * Xen para-virtual sound device
6 * Copyright (C) 2016-2018 EPAM Systems Inc.
23 struct xen_snd_front_evtchnl *channel = dev_id; in evtchnl_interrupt_req() local
24 struct xen_snd_front_info *front_info = channel->front_info; in evtchnl_interrupt_req()
28 if (unlikely(channel->stat in evtchnl_interrupt_req()
89 struct xen_snd_front_evtchnl *channel = dev_id; evtchnl_interrupt_evt() local
133 xen_snd_front_evtchnl_flush(struct xen_snd_front_evtchnl * channel) xen_snd_front_evtchnl_flush() argument
144 evtchnl_free(struct xen_snd_front_info * front_info,struct xen_snd_front_evtchnl * channel) evtchnl_free() argument
192 evtchnl_alloc(struct xen_snd_front_info * front_info,int index,struct xen_snd_front_evtchnl * channel,enum xen_snd_front_evtchnl_type type) evtchnl_alloc() argument
336 evtchnl_publish(struct xenbus_transaction xbt,struct xen_snd_front_evtchnl * channel,const char * path,const char * node_ring,const char * node_chnl) evtchnl_publish() argument
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/linux/Documentation/devicetree/bindings/dma/
H A Dcirrus,ep9301-dma-m2p.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/cirrus,ep9301-dma-m2p.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexander Sverdlin <alexander.sverdlin@gmail.com>
11 - Nikita Shubin <nikita.shubin@maquefel.me>
14 - $ref: dma-controller.yaml#
19 - const: cirrus,ep9301-dma-m2p
20 - items:
21 - enum:
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/linux/drivers/net/ipa/
H A Dgsi.c1 // SPDX-License-Identifier: GPL-2.0
3 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2018-2024 Linaro Ltd.
29 * providing a well-defined communication layer between the AP subsystem
32 * -------- ---------
34 * | AP +<---. .----+ Modem |
35 * | +--. | | .->+ |
37 * -------- | | | | ---------
39 * --+-+---+-+--
41 * |-----------|
[all …]
/linux/drivers/scsi/qla2xxx/
H A Dqla_devtbl.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 "QLA2340", "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x100 */
9 "QLA2342", "133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x101 */
10 "QLA2344", "133MHz PCI-X to 2Gb FC, Quad Channel", /* 0x102 */
11 "QCP2342", "cPCI to 2Gb FC, Dual Channel", /* 0x103 */
12 "QSB2340", "SBUS to 2Gb FC, Single Channel", /* 0x104 */
13 "QSB2342", "SBUS to 2Gb FC, Dual Channel", /* 0x105 */
14 "QLA2310", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x106 */
15 "QLA2332", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x107 */
16 "QCP2332", "Sun cPCI to 2Gb FC, Dual Channel", /* 0x108 */
[all …]
/linux/drivers/rpmsg/
H A Dqcom_glink_trace.h1 /* SPDX-License-Identifier: GPL-2.0 */
24 __entry->version = version;
25 __entry->features = features;
26 __entry->tx = tx;
29 __entry->tx ? "tx" : "rx",
31 __entry->version,
32 __entry->features
49 __entry->version = version;
50 __entry->features = features;
51 __entry->tx = tx;
[all …]
/linux/sound/soc/codecs/
H A Dtas5086.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * - implement DAPM and input muxing
9 * - implement modulation limit
10 * - implement non-default PWM start
13 * because the registers are of unequal size, and multi-byte registers
18 * it doesn't matter because the entire map can be accessed as 8-bit
21 * routines have to be open-coded.
70 #define TAS5086_CHANNEL_VOL(X) (0x08 + (X)) /* Channel 1-6 volume */
88 * Default TAS5086 power-up configuration
172 size = tas5086_register_size(&client->dev, reg); in tas5086_reg_write()
[all …]
/linux/drivers/net/wwan/iosm/
H A Diosm_ipc_imem_ops.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-21 Intel Corporation.
15 /* Open a packet data online channel between the network layer and CP. */
18 dev_dbg(ipc_imem->dev, "%s if id: %d", in ipc_imem_sys_wwan_open()
19 ipc_imem_phase_get_string(ipc_imem->phase), if_id); in ipc_imem_sys_wwan_open()
23 dev_err(ipc_imem->dev, "net:%d : refused phase %s", if_id, in ipc_imem_sys_wwan_open()
24 ipc_imem_phase_get_string(ipc_imem->phase)); in ipc_imem_sys_wwan_open()
25 return -EIO; in ipc_imem_sys_wwan_open()
28 return ipc_mux_open_session(ipc_imem->mux, if_id); in ipc_imem_sys_wwan_open()
35 if (ipc_imem->mux && if_id >= IP_MUX_SESSION_START && in ipc_imem_sys_wwan_close()
[all …]
/linux/sound/soc/sprd/
H A Dsprd-mcdt.c1 // SPDX-License-Identifier: GPL-2.0
14 #include "sprd-mcdt.h"
57 /* Channel water mark definition */
62 /* DMA channel select definition */
75 /* DMA channel ACK select definition */
78 /* Channel FIFO definition */
121 u32 orig = readl_relaxed(mcdt->base + reg); in sprd_mcdt_update()
125 writel_relaxed(tmp, mcdt->base + reg); in sprd_mcdt_update()
128 static void sprd_mcdt_dac_set_watermark(struct sprd_mcdt_dev *mcdt, u8 channel, in sprd_mcdt_dac_set_watermark() argument
131 u32 reg = MCDT_DAC0_WTMK + channel * 4; in sprd_mcdt_dac_set_watermark()
[all …]
/linux/drivers/mailbox/
H A Dmailbox-sti.c1 // SPDX-License-Identifier: GPL-2.0-or-later
30 #define STI_IRQ_SET_OFFSET 0x24 /* Generate a Tx channel interrupt */
33 #define STI_ENA_SET_OFFSET 0x84 /* Enable a channel */
34 #define STI_ENA_CLR_OFFSET 0xa4 /* Disable a channel */
36 #define MBOX_BASE(mdev, inst) ((mdev)->base + ((inst) * 4))
39 * struct sti_mbox_device - STi Mailbox device data
42 * @mbox: Representation of a communication channel controller
51 * A channel an be used for TX or RX
63 * struct sti_mbox_pdata - STi Mailbox platform specific configuration
66 * @num_chan: Maximum number of channel per instance
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/linux/Documentation/sound/designs/
H A Dchannel-mapping-api.rst2 ALSA PCM channel-mapping API
10 The channel mapping API allows user to query the possible channel maps
11 and the current channel map, also optionally to modify the channel map
14 A channel map is an array of position for each PCM channel.
15 Typically, a stereo PCM stream has a channel map of
17 while a 4.0 surround PCM stream has a channel map of
20 The problem, so far, was that we had no standard channel map
21 explicitly, and applications had no way to know which channel
29 was no way to specify this because of lack of channel map
30 specification. These are the main motivations for the new channel
[all …]
/linux/drivers/gpu/host1x/
H A Dchannel.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Tegra host1x Channel
5 * Copyright (c) 2010-2013, NVIDIA Corporation.
11 #include "channel.h"
19 chlist->channels = kcalloc(num_channels, sizeof(struct host1x_channel), in host1x_channel_list_init()
21 if (!chlist->channels) in host1x_channel_list_init()
22 return -ENOMEM; in host1x_channel_list_init()
24 chlist->allocated_channels = bitmap_zalloc(num_channels, GFP_KERNEL); in host1x_channel_list_init()
25 if (!chlist->allocated_channels) { in host1x_channel_list_init()
26 kfree(chlist->channels); in host1x_channel_list_init()
[all …]
/linux/Documentation/networking/
H A Dppp_generic.rst1 .. SPDX-License-Identifier: GPL-2.0
4 PPP Generic Driver and Channel Interface
12 The generic PPP driver in linux-2.4 provides an implementation of the
26 the services of PPP ``channels``. A PPP channel encapsulates a
28 PPP channel implementation can be arbitrarily complex internally but
31 handle ioctl requests. Currently there are PPP channel
36 natural and straightforward way, by allowing more than one channel to
42 PPP channel API
43 ---------------
49 Each channel has to provide two functions to the generic PPP layer,
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/linux/drivers/hsi/controllers/
H A Domap_ssi_regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
33 # define SSI_DATAACCEPT(channel) (1 << (channel)) argument
34 # define SSI_DATAAVAILABLE(channel) (1 << ((channel) + 8)) argument
35 # define SSI_DATAOVERRUN(channel) (1 << ((channel) + 16)) argument
40 # define SSI_GDD_LCH(channel) (1 << (channel)) argument
44 # define SSI_WAKE(channel) (1 << (channel)) argument
62 # define SSI_FULL(channel) (1 << (channel)) argument
71 #define SSI_SST_BUFFER_CH_REG(channel) (0x80 + ((channel) * 4)) argument
72 #define SSI_SST_SWAPBUF_CH_REG(channel) (0xc0 + ((channel) * 4)) argument
82 # define SSI_NOTEMPTY(channel) (1 << (channel)) argument
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/linux/drivers/firmware/tegra/
H A Dbpmp.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <soc/tegra/bpmp-abi.h>
21 #include "bpmp-private.h"
28 channel_to_ops(struct tegra_bpmp_channel *channel) in channel_to_ops() argument
30 struct tegra_bpmp *bpmp = channel->bpmp; in channel_to_ops()
32 return bpmp->soc->ops; in channel_to_ops()
41 np = of_parse_phandle(dev->of_node, "nvidia,bpmp", 0); in tegra_bpmp_get()
43 return ERR_PTR(-ENOENT); in tegra_bpmp_get()
47 bpmp = ERR_PTR(-ENODEV); in tegra_bpmp_get()
53 bpmp = ERR_PTR(-EPROBE_DEFER); in tegra_bpmp_get()
[all …]
/linux/drivers/gpu/drm/xe/
H A Dxe_hwmon.c1 // SPDX-License-Identifier: MIT
6 #include <linux/hwmon-sysfs.h>
73 * SF_* - scale factors for particular quantities according to hwmon spec.
82 * PL*_HWMON_ATTR - mapping of hardware power limits to corresponding hwmon power attribute.
95 * struct xe_hwmon_energy_info - to accumulate energy
105 * struct xe_hwmon_fan_info - to cache previous fan reading
115 * struct xe_hwmon - xe hwmon data structure
143 static int xe_hwmon_pcode_read_power_limit(const struct xe_hwmon *hwmon, u32 attr, int channel, in xe_hwmon_pcode_read_power_limit() argument
146 struct xe_tile *root_tile = xe_device_get_root_tile(hwmon->xe); in xe_hwmon_pcode_read_power_limit()
151 (channel == CHANNEL_CARD) ? in xe_hwmon_pcode_read_power_limit()
[all …]
/linux/drivers/tty/serial/jsm/
H A Djsm_tty.c1 // SPDX-License-Identifier: GPL-2.0+
32 jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "start\n"); in jsm_get_mstat()
34 mstat = (ch->ch_mostat | ch->ch_mistat); in jsm_get_mstat()
51 jsm_dbg(IOCTL, &ch->ch_bd->pci_dev, "finish\n"); in jsm_get_mstat()
66 struct jsm_channel *channel = in jsm_tty_get_mctrl() local
69 jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "start\n"); in jsm_tty_get_mctrl()
71 result = jsm_get_mstat(channel); in jsm_tty_get_mctrl()
74 return -ENXIO; in jsm_tty_get_mctrl()
76 jsm_dbg(IOCTL, &channel->ch_bd->pci_dev, "finish\n"); in jsm_tty_get_mctrl()
88 struct jsm_channel *channel = in jsm_tty_set_mctrl() local
[all …]
/linux/drivers/hv/
H A Dchannel_mgmt.c1 // SPDX-License-Identifier: GPL-2.0-only
29 static void init_vp_index(struct vmbus_channel *channel);
46 /* Fibre Channel */
148 * 64 KB ring buffer + 4 KB header should be sufficient size for any Hyper-V device apart
170 * The rescinded channel may be blocked waiting for a response from the host;
173 static void vmbus_rescind_cleanup(struct vmbus_channel *channel) in vmbus_rescind_cleanup() argument
180 channel->rescind = true; in vmbus_rescind_cleanup()
184 if (msginfo->waiting_channel == channel) { in vmbus_rescind_cleanup()
185 complete(&msginfo->waitevent); in vmbus_rescind_cleanup()
202 static u16 hv_get_dev_type(const struct vmbus_channel *channel) in hv_get_dev_type() argument
[all …]
/linux/drivers/usb/musb/
H A Dmusbhsdma.c1 // SPDX-License-Identifier: GPL-2.0
3 * MUSB OTG driver - support for Mentor's DMA controller
6 * Copyright (C) 2005-2007 by Texas Instruments
35 /* control register (16-bit): */
54 struct dma_channel channel; member
66 struct musb_dma_channel channel[MUSB_HSDMA_CHANNELS]; member
74 static void dma_channel_release(struct dma_channel *channel);
78 struct musb *musb = controller->private_data; in dma_controller_stop()
79 struct dma_channel *channel; in dma_controller_stop() local
82 if (controller->used_channels != 0) { in dma_controller_stop()
[all …]

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