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/linux/drivers/dma/dw-edma/
H A Ddw-edma-v0-core.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2019 Synopsys, Inc. and/or its affiliates.
11 #include <linux/io-64-nonatomic-lo-hi.h>
13 #include "dw-edma-core.h"
14 #include "dw-edma-v0-core.h"
15 #include "dw-edma-v0-regs.h"
16 #include "dw-edma-v0-debugfs.h"
30 return dw->chip->reg_base; in __dw_regs()
33 #define SET_32(dw, name, value) \ argument
34 writel(value, &(__dw_regs(dw)->name))
[all …]
H A Ddw-hdma-v0-core.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/io-64-nonatomic-lo-hi.h>
11 #include "dw-edma-core.h"
12 #include "dw-hdma-v0-core.h"
13 #include "dw-hdma-v0-regs.h"
14 #include "dw-hdma-v0-debugfs.h"
28 return dw->chip->reg_base; in __dw_regs()
35 return &(__dw_regs(dw)->ch[ch].wr); in __dw_ch_regs()
37 return &(__dw_regs(dw)->ch[ch].rd); in __dw_ch_regs()
40 #define SET_CH_32(dw, dir, ch, name, value) \ argument
[all …]
/linux/sound/soc/codecs/
H A Daudio-iio-aux.c1 // SPDX-License-Identifier: GPL-2.0-only
22 const char *name; member
37 struct audio_iio_aux_chan *chan = (struct audio_iio_aux_chan *)kcontrol->private_value; in audio_iio_aux_info_volsw() local
39 uinfo->count = 1; in audio_iio_aux_info_volsw()
40 uinfo->value.integer.min = 0; in audio_iio_aux_info_volsw()
41 uinfo->value.integer.max = chan->max - chan->min; in audio_iio_aux_info_volsw()
42 uinfo->type = (uinfo->value.integer.max == 1) ? in audio_iio_aux_info_volsw()
50 struct audio_iio_aux_chan *chan = (struct audio_iio_aux_chan *)kcontrol->private_value; in audio_iio_aux_get_volsw() local
51 int max = chan->max; in audio_iio_aux_get_volsw()
52 int min = chan->min; in audio_iio_aux_get_volsw()
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/linux/drivers/dma/
H A Ddmaengine.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
7 * This code implements the DMA subsystem. It provides a HW-neutral interface
29 * See Documentation/driver-api/dmaengine for more details
35 #include <linux/dma-mapping.h>
65 /* --- debugfs implementation --- */
73 dma_dev->dbg_dev_root = debugfs_create_dir(dev_name(dma_dev->dev), in dmaengine_debug_register()
75 if (IS_ERR(dma_dev->dbg_dev_root)) in dmaengine_debug_register()
76 dma_dev->dbg_dev_root = NULL; in dmaengine_debug_register()
81 debugfs_remove_recursive(dma_dev->dbg_dev_root); in dmaengine_debug_unregister()
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H A Dof-dma.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
24 * of_dma_find_controller - Get a DMA controller in DT DMA helpers list
37 if (ofdma->of_node == dma_spec->np) in of_dma_find_controller()
41 dma_spec->np); in of_dma_find_controller()
47 * of_dma_router_xlate - translation function for router devices
58 struct dma_chan *chan; in of_dma_router_xlate() local
65 route_data = ofdma->of_dma_route_allocate(&dma_spec_target, ofdma); in of_dma_router_xlate()
71 ofdma->dma_router->route_free(ofdma->dma_router->dev, in of_dma_router_xlate()
73 chan = ERR_PTR(-EPROBE_DEFER); in of_dma_router_xlate()
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/linux/drivers/video/fbdev/nvidia/
H A Dnv_i2c.c2 * linux/drivers/video/nvidia/nvidia-i2c.c - nVidia i2c
6 * Based on rivafb-i2c.c
30 struct nvidia_i2c_chan *chan = data; in nvidia_gpio_setscl() local
31 struct nvidia_par *par = chan->par; in nvidia_gpio_setscl()
34 val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0; in nvidia_gpio_setscl()
41 NVWriteCrtc(par, chan->ddc_base + 1, val | 0x01); in nvidia_gpio_setscl()
46 struct nvidia_i2c_chan *chan = data; in nvidia_gpio_setsda() local
47 struct nvidia_par *par = chan->par; in nvidia_gpio_setsda()
50 val = NVReadCrtc(par, chan->ddc_base + 1) & 0xf0; in nvidia_gpio_setsda()
57 NVWriteCrtc(par, chan->ddc_base + 1, val | 0x01); in nvidia_gpio_setsda()
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/linux/drivers/soc/ti/
H A Dknav_dma.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/dma-direction.h>
100 char name[32]; member
124 #define chan_number(ch) ((ch->direction == DMA_MEM_TO_DEV) ? \
125 ch->channel : ch->flow)
136 static bool check_config(struct knav_dma_chan *chan, struct knav_dma_cfg *cfg) in check_config() argument
138 if (!memcmp(&chan->cfg, cfg, sizeof(*cfg))) in check_config()
144 static int chan_start(struct knav_dma_chan *chan, in chan_start() argument
149 spin_lock(&chan->lock); in chan_start()
150 if ((chan->direction == DMA_MEM_TO_DEV) && chan->reg_chan) { in chan_start()
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/linux/drivers/media/pci/mgb4/
H A Dmgb4_dma.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2021-2022 Digiteq Automotive
11 #include <linux/dma-direction.h>
17 struct mgb4_dma_channel *chan = param; in chan_irq() local
19 complete(&chan->req_compl); in chan_irq()
26 struct mgb4_dma_channel *chan; in mgb4_dma_transfer() local
28 struct pci_dev *pdev = mgbdev->pdev; in mgb4_dma_transfer()
37 chan = &mgbdev->h2c_chan[channel]; in mgb4_dma_transfer()
42 chan = &mgbdev->c2h_chan[channel]; in mgb4_dma_transfer()
45 ret = dmaengine_slave_config(chan->chan, &cfg); in mgb4_dma_transfer()
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/linux/drivers/gpu/drm/gma500/
H A Dintel_i2c.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2006-2007 Intel Corporation
11 #include <linux/i2c-algo-bit.h>
25 struct gma_i2c_chan *chan = data; in get_clock() local
26 struct drm_device *dev = chan->drm_dev; in get_clock()
29 val = REG_READ(chan->reg); in get_clock()
35 struct gma_i2c_chan *chan = data; in get_data() local
36 struct drm_device *dev = chan->drm_dev; in get_data()
39 val = REG_READ(chan->reg); in get_data()
45 struct gma_i2c_chan *chan = data; in set_clock() local
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/linux/drivers/video/fbdev/aty/
H A Dradeon_i2c.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/i2c-algo-bit.h>
20 struct radeon_i2c_chan *chan = data; in radeon_gpio_setscl() local
21 struct radeonfb_info *rinfo = chan->rinfo; in radeon_gpio_setscl()
24 val = INREG(chan->ddc_reg) & ~(VGA_DDC_CLK_OUT_EN); in radeon_gpio_setscl()
28 OUTREG(chan->ddc_reg, val); in radeon_gpio_setscl()
29 (void)INREG(chan->ddc_reg); in radeon_gpio_setscl()
34 struct radeon_i2c_chan *chan = data; in radeon_gpio_setsda() local
35 struct radeonfb_info *rinfo = chan->rinfo; in radeon_gpio_setsda()
38 val = INREG(chan->ddc_reg) & ~(VGA_DDC_DATA_OUT_EN); in radeon_gpio_setsda()
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/linux/drivers/video/fbdev/riva/
H A Drivafb-i2c.c2 * linux/drivers/video/riva/fbdev-i2c.c - nVidia i2c
8 * Based on radeonfb-i2c.c
29 struct riva_i2c_chan *chan = data; in riva_gpio_setscl() local
30 struct riva_par *par = chan->par; in riva_gpio_setscl()
33 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setscl()
34 val = VGA_RD08(par->riva.PCIO, 0x3d5) & 0xf0; in riva_gpio_setscl()
41 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setscl()
42 VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1); in riva_gpio_setscl()
47 struct riva_i2c_chan *chan = data; in riva_gpio_setsda() local
48 struct riva_par *par = chan->par; in riva_gpio_setsda()
[all …]
/linux/drivers/video/fbdev/i810/
H A Di810-i2c.c1 /*-*- linux-c -*-
2 * linux/drivers/video/i810-i2c.c -- Intel 810/815 I2C support
44 struct i810fb_i2c_chan *chan = data; in i810i2c_setscl() local
45 struct i810fb_par *par = chan->par; in i810i2c_setscl()
46 u8 __iomem *mmio = par->mmio_start_virtual; in i810i2c_setscl()
49 i810_writel(mmio, chan->ddc_base, SCL_DIR_MASK | SCL_VAL_MASK); in i810i2c_setscl()
51 i810_writel(mmio, chan->ddc_base, SCL_DIR | SCL_DIR_MASK | SCL_VAL_MASK); in i810i2c_setscl()
52 i810_readl(mmio, chan->ddc_base); /* flush posted write */ in i810i2c_setscl()
57 struct i810fb_i2c_chan *chan = data; in i810i2c_setsda() local
58 struct i810fb_par *par = chan->par; in i810i2c_setsda()
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/linux/drivers/mailbox/
H A Dmailbox-sti.c1 // SPDX-License-Identifier: GPL-2.0-or-later
36 #define MBOX_BASE(mdev, inst) ((mdev)->base + ((inst) * 4))
39 * struct sti_mbox_device - STi Mailbox device data
44 * @name: Name of the mailbox
57 const char *name; member
63 * struct sti_mbox_pdata - STi Mailbox platform specific configuration
74 * struct sti_channel - STi Mailbox allocated channel information
86 static inline bool sti_mbox_channel_is_enabled(struct mbox_chan *chan) in sti_mbox_channel_is_enabled() argument
88 struct sti_channel *chan_info = chan->con_priv; in sti_mbox_channel_is_enabled()
89 struct sti_mbox_device *mdev = chan_info->mdev; in sti_mbox_channel_is_enabled()
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H A Dti-msgmgr.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2022 Texas Instruments Incorporated - https://www.ti.com/
22 #include <linux/soc/ti/ti-msgmgr.h>
41 * struct ti_msgmgr_valid_queue_desc - SoC valid queues meant for this processor
53 * struct ti_msgmgr_desc - Description of message manager integration
64 * @data_region_name: Name of the proxy data region
65 * @status_region_name: Name of the proxy status region
66 * @ctrl_region_name: Name of the proxy control region
92 * struct ti_queue_inst - Description of a queue instance
93 * @name: Queue Name
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/linux/drivers/video/fbdev/savage/
H A Dsavagefb-i2c.c2 * linux/drivers/video/savage/savagefb-i2c.c - S3 Savage DDC2
6 * Based partly on rivafb-i2c.c
47 struct savagefb_i2c_chan *chan = data; in savage4_gpio_setscl() local
50 r = readl(chan->ioaddr + chan->reg); in savage4_gpio_setscl()
55 writel(r, chan->ioaddr + chan->reg); in savage4_gpio_setscl()
56 readl(chan->ioaddr + chan->reg); /* flush posted write */ in savage4_gpio_setscl()
61 struct savagefb_i2c_chan *chan = data; in savage4_gpio_setsda() local
64 r = readl(chan->ioaddr + chan->reg); in savage4_gpio_setsda()
69 writel(r, chan->ioaddr + chan->reg); in savage4_gpio_setsda()
70 readl(chan->ioaddr + chan->reg); /* flush posted write */ in savage4_gpio_setsda()
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/linux/arch/sh/drivers/pci/
H A Dpcie-sh7786.c1 // SPDX-License-Identifier: GPL-2.0
3 * Low-Level PCI Express Support for the SH7786
5 * Copyright (C) 2009 - 2011 Paul Mundt
15 #include <linux/dma-map-ops.h>
21 #include "pcie-sh7786.h"
44 .name = "PCIe0 MEM 0",
46 .end = 0xfd000000 + SZ_8M - 1,
49 .name = "PCIe0 MEM 1",
51 .end = 0xc0000000 + SZ_512M - 1,
54 .name = "PCIe0 MEM 2",
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/linux/drivers/iio/multiplexer/
H A Diio-mux.c1 // SPDX-License-Identifier: GPL-2.0
34 struct iio_chan_spec *chan; member
42 struct mux_child *child = &mux->child[idx]; in iio_mux_select()
43 struct iio_chan_spec const *chan = &mux->chan[idx]; in iio_mux_select() local
47 ret = mux_control_select_delay(mux->control, chan->channel, in iio_mux_select()
48 mux->delay_us); in iio_mux_select()
50 mux->cached_state = -1; in iio_mux_select()
54 if (mux->cached_state == chan->channel) in iio_mux_select()
57 if (chan->ext_info) { in iio_mux_select()
58 for (i = 0; chan->ext_info[i].name; ++i) { in iio_mux_select()
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/linux/sound/soc/
H A Dsoc-generic-dmaengine-pcm.c1 // SPDX-License-Identifier: GPL-2.0+
4 // Author: Lars-Peter Clausen <lars@metafoo.de>
13 #include <linux/dma-mapping.h>
31 if (!pcm->chan[substream->stream]) in dmaengine_dma_dev()
34 return pcm->chan[substrea in dmaengine_dma_dev()
81 struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream); dmaengine_pcm_hw_params() local
104 struct dma_chan *chan = pcm->chan[substream->stream]; dmaengine_pcm_set_runtime_hwparams() local
152 struct dma_chan *chan = pcm->chan[substream->stream]; dmaengine_pcm_open() local
201 dmaengine_pcm_can_report_residue(struct device * dev,struct dma_chan * chan) dmaengine_pcm_can_report_residue() argument
353 const char *name; dmaengine_pcm_request_chan_of() local
354 struct dma_chan *chan; dmaengine_pcm_request_chan_of() local
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/linux/include/linux/iio/
H A Dbackend.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
31 * IIO_BACKEND_EX_INFO - Helper for an IIO extended channel attribute
32 * @_name: Attribute name
37 .name = (_name), \
45 * struct iio_backend_data_fmt - Backend data format
88 * struct iio_backend_ops - operations structure for an iio_backend
124 int (*chan_enable)(struct iio_backend *back, unsigned int chan);
125 int (*chan_disable)(struct iio_backend *back, unsigned int chan);
126 int (*data_format_set)(struct iio_backend *back, unsigned int chan,
128 int (*data_source_set)(struct iio_backend *back, unsigned int chan,
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/linux/drivers/iio/
H A Dindustrialio-backend.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * -------------------------------------------------------
12 * ------------------ | ------------ ------------ ------- FPGA|
13 * | ADC |------------------------| | ADC CORE |---------| DMA CORE |------| RAM | |
14 * | (Frontend/IIO) | Serial Data (eg: LVDS) | |(backend) |---------| |------| | |
15 * | |------------------------| ------------ ------------ ------- |
16 * ------------------ -------------------------------------------------------
19 * - Backends should register themselves with devm_iio_backend_register()
20 * - Frontend devices should get backends with devm_iio_backend_get()
27 * the industrialio-backend.c is only left with the really generic stuff. Then,
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/linux/arch/arm/mach-footbridge/
H A Ddma-isa.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1999-2000 Russell King
11 * arch/arm/kernel/dma-ebsa285.c
14 #include <linux/dma-map-ops.h>
17 #include <linux/dma-mapping.h>
44 static int isa_get_dma_residue(unsigned int chan, dma_t *dma) in isa_get_dma_residue() argument
46 unsigned int io_port = isa_dma_port[chan][ISA_DMA_COUNT]; in isa_get_dma_residue()
52 return chan < 4 ? count : (count << 1); in isa_get_dma_residue()
61 static void isa_enable_dma(unsigned int chan, dma_t *dma) in isa_enable_dma() argument
63 if (dma->invalid) { in isa_enable_dma()
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/linux/drivers/iio/dac/
H A Dad5686.c1 // SPDX-License-Identifier: GPL-2.0
29 const struct iio_chan_spec *chan) in ad5686_get_powerdown_mode() argument
33 return ((st->pwr_down_mode >> (chan->channel * 2)) & 0x3) - 1; in ad5686_get_powerdown_mode()
37 const struct iio_chan_spec *chan, in ad5686_set_powerdown_mode() argument
42 st->pwr_down_mode &= ~(0x3 << (chan->channel * 2)); in ad5686_set_powerdown_mode()
43 st->pwr_down_mode |= ((mode + 1) << (chan->channel * 2)); in ad5686_set_powerdown_mode()
56 uintptr_t private, const struct iio_chan_spec *chan, char *buf) in ad5686_read_dac_powerdown() argument
60 return sysfs_emit(buf, "%d\n", !!(st->pwr_down_mask & in ad5686_read_dac_powerdown()
61 (0x3 << (chan->channel * 2)))); in ad5686_read_dac_powerdown()
66 const struct iio_chan_spec *chan, in ad5686_write_dac_powerdown() argument
[all …]
H A Dad3530r.c1 // SPDX-License-Identifier: GPL-2.0
3 * AD3530R/AD3530 8-channel, 16-bit Voltage Output DAC Driver
4 * AD3531R/AD3531 4-channel, 16-bit Voltage Output DAC Driver
46 #define AD3530R_OP_MODE_CHAN_MSK(chan) (GENMASK(1, 0) << 2 * (chan)) argument
56 /* Non-constant mask variant of FIELD_PREP() */
57 #define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask))
72 const char *name; member
84 struct ad3530r_chan chan[AD3530R_MAX_CHANNELS]; member
112 const struct iio_chan_spec *chan) in ad3530r_get_powerdown_mode() argument
116 guard(mutex)(&st->lock); in ad3530r_get_powerdown_mode()
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/linux/arch/sh/drivers/dma/
H A Ddma-sysfs.c1 // SPDX-License-Identifier: GPL-2.0
3 * arch/sh/drivers/dma/dma-sysfs.c
7 * Copyright (C) 2004 - 2006 Paul Mundt
19 .name = "dma",
37 channel->chan, info->name, in dma_show_devices()
38 channel->dev_id); in dma_show_devices()
68 return sprintf(buf, "%s\n", channel->dev_id); in dma_show_dev_id()
76 strcpy(channel->dev_id, buf); in dma_store_dev_id()
90 dma_configure_channel(channel->vchan, config); in dma_store_config()
101 return sprintf(buf, "0x%08x\n", channel->mode); in dma_show_mode()
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/linux/include/linux/
H A Ddmaengine.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
18 * typedef dma_cookie_t - an opaque DMA cookie
31 * enum dma_status - DMA transaction status
46 * enum dma_transaction_type - DMA transaction types/indexes
73 * enum dma_transfer_direction - dma transfer mode and direction indicator
89 * ----------------------------
91 * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
96 * it is to be repeated and other per-transfer attributes.
103 * | Frame-1 | Frame-2 | ~ | Frame-'numf' |
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