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/linux/Documentation/devicetree/bindings/clock/
H A Dti,cdce925.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexander Stein <alexander.stein@ew.tq-group.com>
15 - CDCE(L)913: 1-PLL, 3 Outputs https://www.ti.com/product/cdce913
16 - CDCE(L)925: 2-PLL, 5 Outputs https://www.ti.com/product/cdce925
17 - CDCE(L)937: 3-PLL, 7 Outputs https://www.ti.com/product/cdce937
18 - CDCE(L)949: 4-PLL, 9 Outputs https://www.ti.com/product/cdce949
23 - ti,cdce913
24 - ti,cdce925
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dx1p42100-asus-zenbook-a14.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
7 /dts-v1/;
10 #include "x1-asus-zenbook-a14.dtsi"
12 /delete-node/ &pmc8380_6;
13 /delete-node/ &pmc8380_6_thermal;
17 compatible = "asus,zenbook-a14-ux3407qa", "qcom,x1p42100";
19 wcn6855-pmu {
20 compatible = "qcom,wcn6855-pmu";
22 vddaon-supply = <&vreg_wcn_0p95>;
[all …]
H A Dqcs6490-rb3gen2-vision-mezzanine.dtso1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
10 /dts-v1/;
13 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
14 #include <dt-bindings/gpio/gpio.h>
17 vdda-phy-supply = <&vreg_l10c_0p88>;
18 vdda-pll-supply = <&vreg_l6b_1p2>;
23 #address-cells = <1>;
24 #size-cells = <0>;
31 clock-lanes = <7>;
[all …]
H A Dqcs8550-aim300-aiot.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
9 #include "qcs8550-aim300.dtsi"
16 compatible = "qcom,qcs8550-aim300-aiot", "qcom,qcs8550-aim300", "qcom,qcs8550",
24 stdout-path = "serial0:115200n8";
27 gpio-keys {
28 compatible = "gpio-keys";
30 pinctrl-0 = <&volume_up_n>;
[all …]
H A Dsc7280-crd-r3.dts1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
8 /dts-v1/;
10 #include "sc7280-idp.dtsi"
11 #include "sc7280-idp-ec-h1.dtsi"
14 model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)";
15 compatible = "qcom,sc7280-crd",
16 "google,hoglin-rev3", "google,hoglin-rev4",
17 "google,piglin-rev3", "google,piglin-rev4",
25 stdout-path = "serial0:115200n8";
[all …]
H A Dsc7280-herobrine-villager-r1.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
9 #include "sc7280-herobrine-villager.dtsi"
10 #include "sc7280-herobrine-audio-wcd9385.dtsi"
13 vdd-micb-supply = <&pp1800_l2c>;
17 audio-routing =
22 "VA DMIC0", "vdd-micb",
23 "VA DMIC1", "vdd-micb",
24 "VA DMIC2", "vdd-micb",
25 "VA DMIC3", "vdd-micb",
H A Dipq9574-rdp-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
6 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/leds/common.h>
22 stdout-path = "serial0:115200n8";
26 compatible = "regulator-fixed";
27 regulator-min-microvolt = <3300000>;
[all …]
H A Dsdx75-idp.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
16 compatible = "qcom,sdx75-idp", "qcom,sdx75";
22 vph_pwr: vph-pwr-regulator {
23 compatible = "regulator-fixed";
24 regulator-name = "vph_pwr";
25 regulator-min-microvolt = <3700000>;
26 regulator-max-microvolt = <3700000>;
[all …]
H A Dipq5332-rdp468.dts1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
8 /dts-v1/;
10 #include "ipq5332-rdp-common.dtsi"
14 compatible = "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332";
16 regulator_fixed_5p0: regulator-s0500 {
17 compatible = "regulator-fixed";
18 regulator-min-microvolt = <500000>;
19 regulator-max-microvolt = <500000>;
20 regulator-boot-on;
[all …]
H A Dsm8750-qrd.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
20 #include "sm8750-pmics.dtsi"
24 compatible = "qcom,sm8750-qrd", "qcom,sm8750";
25 chassis-type = "handset";
31 wcd939x: audio-codec {
[all …]
/linux/arch/arm/boot/dts/ti/davinci/
H A Dda850-lego-ev3.dts1 // SPDX-License-Identifier: GPL-2.0-only
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/linux-event-codes.h>
11 #include <dt-bindings/pwm/pwm.h>
32 compatible = "gpio-keys";
34 pinctrl-names = "default";
35 pinctrl-0 = <&button_bias>;
37 center {
38 label = "Center";
[all …]
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Drockchip,rk3399-dmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
15 - rockchip,rk3399-dmc
17 devfreq-events:
26 clock-names:
28 - const: dmc_clk
30 operating-points-v2: true
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-gru-scarlet.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-scarlet board device tree source
8 #include "rk3399-gru.dtsi"
11 chassis-type = "tablet";
16 pp1250_s3: regulator-pp1250-s3 {
17 compatible = "regulator-fixed";
18 regulator-name = "pp1250_s3";
21 regulator-always-on;
22 regulator-boot-on;
23 regulator-min-microvolt = <1250000>;
[all …]
H A Drk3399-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/pwm/pwm.h>
8 #include "rk3399-base.dtsi"
12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
20 compatible = "pwm-backlight";
21 brightness-levels = <
54 default-brightness-level = <200>;
58 edp_panel: edp-panel {
59 compatible = "lg,lp079qx1-sp0v";
[all …]
H A Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: regulator-pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
19 regulator-max-microvolt = <900000>;
[all …]
H A Drk3399-pinebook-pro.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/linux-event-codes.h>
11 #include <dt-bindings/pwm/pwm.h>
12 #include <dt-bindings/usb/pd.h>
13 #include <dt-bindings/leds/common.h>
18 compatible = "pine64,pinebook-pro", "rockchip,rk3399";
19 chassis-type = "laptop";
28 stdout-path = "serial2:1500000n8";
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-sdx65-mtp.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
5 /dts-v1/;
11 #include "qcom-sdx65.dtsi"
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
19 compatible = "qcom,sdx65-mtp", "qcom,sdx65";
20 qcom,board-id = <0x2010008 0x302>;
27 stdout-path = "serial0:115200n8";
30 reserved-memory {
31 #address-cells = <1>;
[all …]
/linux/drivers/hid/
H A Dhid-nintendo.c1 // SPDX-License-Identifier: GPL-2.0+
3 * HID driver for Nintendo Switch Joy-Cons and Pro Controllers
5 * Copyright (c) 2019-2021 Daniel J. Ogorchock <djogorchock@gmail.com>
12 * https://gitlab.com/pjranki/joycon-linux-kernel (Peter Rankin)
16 * hid-wiimote kernel hid driver
17 * hid-logitech-hidpp driver
18 * hid-sony driver
20 * This driver supports the Nintendo Switch Joy-Cons and Pro Controllers. The
31 #include "hid-ids.h"
120 (JC_CAL_USR_LEFT_DATA_END - JC_CAL_USR_LEFT_DATA_ADDR + 1)
[all …]
H A Dhid-lg4ff.c1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #include "hid-lg.h"
21 #include "hid-lg4ff.h"
22 #include "hid-ids.h"
45 #define LG4FF_DFEX_TAG "DF-EX"
91 -1
95 -1
227 /* EXT_CMD9 - Understood by G27 and DFGT */
231 0xf8, 0x09, 0x00, 0x01, 0x00, 0x00, 0x00} /* Switch mode to DF-EX with detach */
264 /* EXT_CMD1 - Understood by DFP, G25, G27 and DFGT */
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dqcom,pcie-sc7280.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-sc7280.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
19 const: qcom,pcie-sc7280
25 reg-names:
28 - const: parf # Qualcomm specific registers
29 - const: dbi # DesignWare PCIe registers
[all …]
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-m31-eusb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
107 { .supply = "vdd" },
108 { .supply = "vdda12" },
143 return -EINVAL; in m31eusb2_phy_write_readback()
157 dev_dbg(&phy->phy->dev, "Offset:%x BitMask:%x Value:%x", in m31eusb2_phy_write_sequence()
158 tbl->off, tbl->mask, tbl->val); in m31eusb2_phy_write_sequence()
160 ret = m31eusb2_phy_write_readback(phy->base, in m31eusb2_phy_write_sequence()
161 tbl->off, tbl->mask, in m31eusb2_phy_write_sequence()
162 tbl->val << __ffs(tbl->mask)); in m31eusb2_phy_write_sequence()
[all …]
/linux/drivers/iio/adc/
H A Dhi8435.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Holt Integrated Circuits HI-8435 threshold detector driver
22 /* Register offsets for HI-8435 */
48 unsigned threshold_lo[2]; /* GND-Open and Supply-Open thresholds */
49 unsigned threshold_hi[2]; /* GND-Open and Supply-Open thresholds */
56 return spi_write_then_read(priv->spi, &reg, 1, val, 1); in hi8435_readb()
65 ret = spi_write_then_read(priv->spi, &reg, 1, &be_val, 2); in hi8435_readw()
77 ret = spi_write_then_read(priv->spi, &reg, 1, &be_val, 4); in hi8435_readl()
85 priv->reg_buffer[0] = reg | HI8435_WRITE_OPCODE; in hi8435_writeb()
86 priv->reg_buffer[1] = val; in hi8435_writeb()
[all …]
/linux/Documentation/driver-api/thermal/
H A Dintel_dptf.rst1 .. SPDX-License-Identifier: GPL-2.0
12 ------------
31 ----------------------------
43 "42A441D6-AE6A-462b-A84B-4A8CE79027D3" : Passive 1
45 "3A95C389-E4B8-4629-A526-C52C88626BAE" : Active
47 "97C68AE7-15FA-499c-B8C9-5DA81D606E0A" : Critical
49 "63BE270F-1C11-48FD-A6F7-3AF253FF3E2D" : Adaptive performance
51 "5349962F-71E6-431D-9AE8-0A635B710AEE" : Emergency call
53 "9E04115A-AE87-4D1C-9500-0F3E340BFE75" : Passive 2
55 "F5A35014-C209-46A4-993A-EB56DE7530A1" : Power Boss
[all …]
/linux/drivers/net/wireless/intel/iwlegacy/
H A D4965.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
8 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
15 #include <linux/dma-mapping.h>
29 * il_verify_inst_sparse - verify runtime uCode image in card vs. host,
44 /* read data comes through single port, auto-incr addr */ in il4965_verify_inst_sparse()
50 ret = -EIO; in il4965_verify_inst_sparse()
61 * il4965_verify_inst_full - verify runtime uCode image in card vs. host,
77 for (; len > 0; len -= sizeof(u32), image++) { in il4965_verify_inst_full()
78 /* read data comes through single port, auto-incr addr */ in il4965_verify_inst_full()
[all …]
/linux/drivers/gpio/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
50 this symbol, but new drivers should use the generic gpio-regmap
60 non-sleeping contexts. They can make bitbanged serial protocols
81 numberspace-based functionalities of the sysfs interface.
137 Enables support for the idio-16 library functions. The idio-16 library
139 ACCES IDIO-16 family such as the 104-IDIO-16 and the PCI-IDIO-16.
141 If built as a module its name will be gpio-idio-16.
147 tristate "GPIO driver for 74xx-ICs with MMIO access"
151 Say yes here to support GPIO functionality for 74xx-compatible ICs
166 If driver is built as a module it will be called gpio-altera.
[all …]

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