Searched full:ce5 (Results 1 – 6 of 6) sorted by relevance
58 /* CE5: target->host pktlog */163 /* CE5: target->host pktlog */243 /* CE5: target->host pktlog */
22 "ce5",
282 - description: CE5
167 /* CE5: target->host HTT (HIF->HTT) */280 /* CE5: target->host HTT (HIF->HTT) */1250 /* No need to acquire ce_lock for CE5, since this is the only place CE5 in ath10k_pci_process_htt_rx_cb()1251 * is processed other than init and deinit. Before releasing CE5 in ath10k_pci_process_htt_rx_cb()1252 * buffers, interrupts are disabled. Thus CE5 access is serialized. in ath10k_pci_process_htt_rx_cb()
794 * So update transfer context all CEs except CE5. in _ath10k_ce_completed_recv_next_nolock()843 * So update transfer context all CEs except CE5. in _ath10k_ce_completed_recv_next_nolock_64()
3893 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH /* CE5 */ >,