Searched +full:ce4100 +full:- +full:lapic (Results 1 – 4 of 4) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
H A D | intel,ce4100-lapic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-lapic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Intel Local Advanced Programmable Interrupt Controller (LAPIC) 10 - Rahul Tanwar <rtanwar@maxlinear.com> 15 architecture design, with a local component (LAPIC) integrated 17 (lapic) receives interrupts from the processor's interrupt pins, 22 Many of the Intel's generic devices like hpet, ioapic, lapic have 23 the ce4100 name in their compatible property names because they [all …]
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H A D | intel,ce4100-ioapic.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-ioapic.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rahul Tanwar <rtanwar@maxlinear.com> 15 architecture design, with a local component (LAPIC) integrated 17 (lapic) receives interrupts from the processor's interrupt pins, 22 Many of the Intel's generic devices like hpet, ioapic, lapic have 23 the ce4100 name in their compatible property names because they 24 first appeared in CE4100 SoC. [all …]
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H A D | intel,ce4100-ioapic.txt | 2 --------------- 7 -------------------- 8 compatible = "intel,ce4100-ioapic"; 9 #interrupt-cells = <2>; 18 0 - Edge Rising 19 1 - Level Low 20 2 - Level High 21 3 - Edge Falling 26 compatible = "intel,ce4100-lapic";
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/freebsd/sys/contrib/device-tree/src/x86/ |
H A D | falconfalls.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * CE4100 on Falcon Falls 7 /dts-v1/; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 20 compatible = "intel,ce4100"; 22 lapic = <&lapic0>; 27 #address-cells = <1>; [all …]
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