Searched full:cdclk0 (Results 1 – 5 of 5) sorted by relevance
/linux/Documentation/devicetree/bindings/clock/ |
H A D | samsung,exynos-audss-clock.yaml | 42 External i2s clock, parent of mout_i2s. "cdclk0" is used if not
|
/linux/drivers/clk/samsung/ |
H A D | clk-exynos-audss.c | 126 const char *mout_i2s_p[] = {"mout_audss", "cdclk0", "sclk_audio0"}; in exynos_audss_clk_probe()
|
H A D | clk-exynos4.c | 306 PNAME(mout_audio0_p4210) = { "cdclk0", "none", "sclk_hdmi24m", 326 "cdclk0", "cdclk1", "cdclk2", "spdif_extclk", 347 PNAME(mout_audio0_p4x12) = { "cdclk0", "none", "sclk_hdmi24m", 369 "cdclk0", "cdclk1", "cdclk2", "spdif_extclk",
|
H A D | clk-exynos5250.c | 205 PNAME(mout_audio0_p) = { "cdclk0", "fin_pll", "sclk_hdmi27m", "sclk_dptxphy",
|
H A D | clk-exynos5420.c | 389 PNAME(mout_audio0_p) = {"fin_pll", "cdclk0", "mout_sclk_dpll",
|