Searched +full:ccn +full:- +full:504 (Results 1 – 4 of 4) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/perf/ |
H A D | arm,ccn.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/perf/arm,ccn.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM CCN (Cache Coherent Network) Performance Monitors 10 - Robin Murphy <robin.murphy@arm.com> 15 - arm,ccn-502 16 - arm,ccn-504 17 - arm,ccn-508 18 - arm,ccn-512 [all …]
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H A D | arm-ccn.txt | 1 * ARM CCN (Cache Coherent Network) 5 - compatible: (standard compatible string) should be one of: 6 "arm,ccn-502" 7 "arm,ccn-504" 8 "arm,ccn-508" 9 "arm,ccn-512" 11 - reg: (standard registers property) physical address and size 14 - interrupts: (standard interrupt property) single interrupt 19 ccn@2000000000 { 20 compatible = "arm,ccn-504";
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/freebsd/sys/contrib/device-tree/src/arm64/amd/ |
H A D | amd-seattle-soc.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 10 interrupt-parent = <&gic0>; 11 #address-cells = <2>; 12 #size-cells = <2>; 14 gic0: interrupt-controller@e1101000 { 15 compatible = "arm,gic-400", "arm,cortex-a15-gic"; 16 interrupt-controller; 17 #interrupt-cells = <3>; 18 #address-cells = <2>; 19 #size-cells = <2>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | fsl-ls208xa.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-2080A family SoC. 6 * Copyright 2017-2020 NXP 12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 32 #address-cells = <1>; [all …]
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