Searched +full:cboz +full:- +full:block +full:- +full:size (Results 1 – 6 of 6) sorted by relevance
| /freebsd/sys/contrib/device-tree/src/riscv/sophgo/ |
| H A D | sg2044-cpus.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 #address-cells = <2>; 8 #size-cells = <2>; 11 #address-cells = <1>; 12 #size-cells = <0>; 13 timebase-frequency = <50000000>; 18 i-cache-block-size = <64>; 19 i-cache-size = <65536>; 20 i-cache-sets = <512>; 21 d-cache-block-size = <64>; [all …]
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| /freebsd/sys/contrib/device-tree/src/riscv/spacemit/ |
| H A D | k1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 6 #include <dt-bindings/clock/spacemit,k1-syscon.h> 8 /dts-v1/; 10 #address-cells = <2>; 11 #size-cells = <2>; 16 #address-cells = <1>; 17 #size-cells = <0>; 18 timebase-frequency = <24000000>; 20 cpu-map { 57 riscv,isa-base = "rv64i"; [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/riscv/ |
| H A D | cpus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: RISC-V CPUs 10 - Paul Walmsley <paul.walmsley@sifive.com> 11 - Palmer Dabbelt <palmer@sifive.com> 12 - Conor Dooley <conor@kernel.org> 15 This document uses some terminology common to the RISC-V community 19 mandated by the RISC-V ISA: a PC and some registers. This 27 - $ref: /schemas/cpu.yaml# [all …]
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| /freebsd/sys/riscv/riscv/ |
| H A D | identcpu.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 4 * Copyright (c) 2015-2016 Ruslan Bukin <br@bsdpad.com> 11 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. 76 /* Supervisor-mode extension support. */ 82 /* Z-extensions support. */ 90 u_int isa_extensions; /* Single-letter extensions. */ 98 u_int z_extensions; /* Multi-letter extensions. */ 109 * Micro-architecture tables. 116 #define MARCHID_END { -1ul, NULL } [all …]
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| /freebsd/sys/contrib/dev/acpica/include/ |
| H A D | actbl2.h | 3 * Name: actbl2.h - ACPI Table Definitions 11 * Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp. 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 108 * any of its subsidiaries will export/re-export any technical data, process, 130 * 3. Neither the names of the above-listed copyright holders nor the names 200 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 201 #define ACPI_SIG_RIMT "RIMT" /* RISC-V IO Mapping Table */ 211 * All tables must be byte-packed to match the ACPI specification, since [all …]
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| /freebsd/sys/contrib/dev/acpica/common/ |
| H A D | dmtbinfo2.c | 3 * Module Name: dmtbinfo2 - Table info for non-AML tables 11 * Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp. 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 108 * any of its subsidiaries will export/re-export any technical data, process, 130 * 3. Neither the names of the above-listed copyright holders nor the names 157 /* This module used for application-level code only */ 165 * - Add the C table definition to the actbl1.h or actbl2.h header. 166 * - Add ACPI_xxxx_OFFSET macro(s) for the table (and subtables) to list below. [all …]
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