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/linux/Documentation/devicetree/bindings/sound/
H A Drockchip-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
14 - Heiko Stuebner <heiko@sntech.de>
17 - $ref: dai-common.yaml#
22 - const: rockchip,rk3066-i2s
23 - items:
24 - enum:
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H A Dxlnx,i2s.txt1 Device-Tree bindings for Xilinx I2S PL block
3 The IP supports I2S based playback/capture audio
6 - compatible: "xlnx,i2s-transmitter-1.0" for playback and
7 "xlnx,i2s-receiver-1.0" for capture
9 Required property common to both I2S playback and capture:
10 - reg: Base address and size of the IP core instance.
11 - xlnx,dwidth: sample data width. Can be any of 16, 24.
12 - xlnx,num-channels: Number of I2S streams. Can be any of 1, 2, 3, 4.
13 supported channels = 2 * xlnx,num-channels
18 compatible = "xlnx,i2s-receiver-1.0";
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H A Dfsl,ssi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
13 Notes on fsl,playback-dma and fsl,capture-dma
14 On SOCs that have an SSI, specific DMA channels are hard-wired for playback
15 and capture. On the MPC8610, for example, SSI1 must use DMA channel 0 for
16 playback and DMA channel 1 for capture. SSI2 must use DMA channel 2 for
17 playback and DMA channel 3 for capture. The developer can choose which
18 DMA controller to use, but the channels themselves are hard-wired. The
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/linux/sound/soc/xilinx/
H A Dxlnx_i2s.c1 // SPDX-License-Identifier: GPL-2.0
32 u32 channels; member
44 return -EINVAL; in xlnx_i2s_set_sclkout_div()
46 drv_data->sysclk = 0; in xlnx_i2s_set_sclkout_div()
48 writel(div, drv_data->base + I2S_I2STIM_OFFSET); in xlnx_i2s_set_sclkout_div()
58 drv_data->sysclk = freq; in xlnx_i2s_set_sysclk()
62 if (drv_data->is_32bit_lrclk) in xlnx_i2s_set_sysclk()
65 bits_per_sample = drv_data->data_width; in xlnx_i2s_set_sysclk()
67 drv_data->ratnum.num = freq / (bits_per_sample * drv_data->channels) / 2; in xlnx_i2s_set_sysclk()
68 drv_data->ratnum.den_step = 1; in xlnx_i2s_set_sysclk()
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/linux/Documentation/sound/cards/
H A Demu-mixer.rst2 E-MU Digital Audio System mixer / default DSP code
5 This document covers the E-MU 0404/1010/1212/1616/1820 PCI/PCI-e/CardBus
9 alternative front-end geared towards semi-professional studio recording.
11 This document is based on audigy-mixer.rst.
17 The EMU10K2 chips have a very short capture FIFO, which makes recording
33 This driver supports only 16-bit 44.1/48 kHz operation. The multi-channel
34 device (see emu10k1-jack.rst) additionally supports 24-bit capture.
37 <https://github.com/ossilator/linux/tree/ossis-emu10k1>`_.
38 Its multi-channel device supports 24-bit for both playback and capture,
62 FX-bus
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H A Dcmipci.rst2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
12 channels can be used for front/rear playbacks. Since there are two
13 DACs, both streams are handled independently unlike the 4/6ch multi-
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
44 on and "double DAC" mode. Actually I could hear separate 4 channels
51 control switch in the driver "Line-In As Rear", which you can change
52 via alsamixer or somewhat else. When this switch is on, line-in jack
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H A Daudiophile-usb.rst2 Guide to using M-Audio Audiophile USB with ALSA and Jack
9 This document is a guide to using the M-Audio Audiophile USB (tm) device with
15 * v1.4 - Thibault Le Meur (2007-07-11)
17 - Added Low Endianness nature of 16bits-modes
19 - Modifying document structure
21 * v1.5 - Thibault Le Meur (2007-07-12)
22 - Added AC3/DTS passthru info
35 - This port supports 2 pairs of line-level audio inputs (1/4" TS and RCA)
36 - When the 1/4" TS (jack) connectors are connected, the RCA connectors
57 * 16-bit/48kHz ==> 4 channels in + 4 channels out
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H A Dmaya44.rst8 keep here as reference -- tiwai
22 … programming information, so I (Rainer Zimmermann) had to find out some card-specific information …
24 This is the first testing version of the Maya44 driver released to the alsa-devel mailing list (Feb…
29 - playback and capture at all sampling rates
30 - input/output level
31 - crossmixing
32 - line/mic switch
33 - phantom power switch
34 - analogue monitor a.k.a bypass
39 - Channel 3+4 analogue - S/PDIF input switching
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H A Demu10k1-jack.rst12 - Lee Revell, 2005.03.30
19 For those unfamiliar with kX ASIO, this consists of 16 capture and 16 playback
20 channels. With a post 2.6.9 Linux kernel, latencies down to 64 (1.33 ms) or
25 fairly self explanatory - select Duplex, then for capture and playback select
26 the multichannel devices, set the in and out channels to 16, and the sample
30 /usr/local/bin/jackd -R -dalsa -r48000 -p64 -n2 -D -Chw:0,2 -Phw:0,3 -S
36 sb-live-mixer.rst (or audigy-mixer.rst).
40 input channels have physical inputs connected to them depends on the card
49 still see 16 capture channels, but only 14 are available for recording inputs.
53 channels.
/linux/Documentation/ABI/testing/
H A Dconfigfs-usb-gadget-uac11 What: /config/usb-gadget/gadget/functions/uac1.name
8 c_chmask capture channel mask
9 c_srate list of capture sampling rates (comma-separated)
10 c_ssize capture sample size (bytes)
11 c_mute_present capture mute control enable
12 c_volume_present capture volume control enable
13 c_volume_min capture volume control min value
15 c_volume_max capture volume control max value
17 c_volume_res capture volume control resolution
20 p_srate list of playback sampling rates (comma-separated)
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/linux/sound/soc/amd/
H A Dacp.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 /* Playback and Capture Offset for Stoney */
26 * playback and SRAM Bank 2 for capture where as in case of BT I2S
28 * be used for capture. Carrizo uses I2S SP controller instance. SRAM Banks
30 * for capture scenario.
73 /* Playback DMA channels */
77 /* Capture DMA channels */
81 /* Playback DMA Channels for I2S BT instance */
85 /* Capture DMA Channels for I2S BT Instance */
89 /* Playback DMA channels for I2S MICSP instance */
/linux/Documentation/admin-guide/media/
H A Dimx.rst1 .. SPDX-License-Identifier: GPL-2.0
3 i.MX Video Capture Driver
7 ------------
10 handles the flow of image frames to and from capture devices and
13 For image capture, the IPU contains the following internal subunits:
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
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/linux/Documentation/sound/designs/
H A Dcontrol-names.rst8 ---------------
17 Capture one direction
19 Bypass Capture one direction
33 <nothing> channel independent, or applies to all channels
34 Front front left/right channels
36 CLFE C/LFE channels
68 Headset Mic mic part of combined headset jack - 4-pin
70 Headphone Mic mic part of either/or - 3-pin headphone or mic
79 Analog Loopback D/A -> A/D loopback
80 Digital Loopback playback -> capture loopback -
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/linux/Documentation/devicetree/bindings/pwm/
H A Dpwm-st.txt2 --------------------------------------
5 - compatible : "st,pwm"
6 - #pwm-cells : Number of cells used to specify a PWM. First cell
7 specifies the per-chip index of the PWM to use and the
8 second cell is the period in nanoseconds - fixed to 2
10 - reg : Physical base address and length of the controller's
12 - pinctrl-names: Set to "default".
13 - pinctrl-0: List of phandles pointing to pin configuration nodes
16 - clock-names: Valid entries are "pwm" and/or "capture".
17 - clocks: phandle of the clock used by the PWM module.
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/linux/sound/soc/mediatek/mt8195/
H A Dmt8195-dai-etdm.c1 // SPDX-License-Identifier: GPL-2.0
14 #include "mt8195-afe-clk.h"
15 #include "mt8195-afe-common.h"
16 #include "mt8195-reg.h"
117 int cowork_slv_id[MT8195_AFE_IO_ETDM_NUM - 1]; //dai_id
180 return -EINVAL; in get_etdm_fs_timing()
183 static unsigned int get_etdm_ch_fixup(unsigned int channels) in get_etdm_ch_fixup() argument
185 if (channels > 16) in get_etdm_ch_fixup()
187 else if (channels > 8) in get_etdm_ch_fixup()
189 else if (channels > 4) in get_etdm_ch_fixup()
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/linux/sound/soc/ti/
H A Domap-mcpdm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap-mcpdm.c -- OMAP ALSA SoC DAI driver using McPDM port
5 * Copyright (C) 2009 - 2011 Texas Instruments
30 #include "omap-mcpdm.h"
31 #include "sdma-pcm.h"
48 /* Playback/Capture configuration */
51 /* McPDM dn offsets for rx1, and 2 channels */
69 writel_relaxed(val, mcpdm->io_base + reg); in omap_mcpdm_write()
74 return readl_relaxed(mcpdm->io_base + reg); in omap_mcpdm_read()
80 dev_dbg(mcpdm->dev, "***********************\n"); in omap_mcpdm_reg_dump()
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/linux/drivers/usb/gadget/function/
H A Du_uac1_legacy.c1 // SPDX-License-Identifier: GPL-2.0+
3 * u_uac1.c -- ALSA audio utilities for Gadget stack
24 /*-------------------------------------------------------------------------*/
47 changed = -EINVAL; in _snd_pcm_hw_param_set()
53 val--; in _snd_pcm_hw_param_set()
60 changed = -EINVAL; in _snd_pcm_hw_param_set()
71 t.min = val - 1; in _snd_pcm_hw_param_set()
80 return -EINVAL; in _snd_pcm_hw_param_set()
82 params->cmask |= 1 << var; in _snd_pcm_hw_param_set()
83 params->rmask |= 1 << var; in _snd_pcm_hw_param_set()
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/linux/sound/firewire/dice/
H A Ddice-pcm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * dice_pcm.c - a part of driver for DICE based devices
6 * Copyright (c) 2014 Takashi Sakamoto <o-takashi@sakamocchi.jp>
14 struct snd_pcm_substream *substream = rule->private; in dice_rate_constraint()
15 struct snd_dice *dice = substream->private_data; in dice_rate_constraint()
16 unsigned int index = substream->pcm->device; in dice_rate_constraint()
29 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) in dice_rate_constraint()
30 pcm_channels = dice->tx_pcm_chs[index]; in dice_rate_constraint()
32 pcm_channels = dice->rx_pcm_chs[index]; in dice_rate_constraint()
52 struct snd_pcm_substream *substream = rule->private; in dice_channels_constraint()
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/linux/sound/usb/
H A Dquirks-table.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
72 #define QUIRK_COMPOSITE_END { .ifnum = -1 }
127 /* Creative BT-D1 */
132 .channels = 2,
146 /* E-Mu 0202 USB */
148 /* E-M
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/linux/sound/soc/tegra/
H A Dtegra210_i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // SPDX-FileCopyrightText: Copyright (c) 2020-2024 NVIDIA CORPORATION & AFFILIATES.
5 // tegra210_i2s.c - Tegra210 I2S driver
44 regmap_write(regmap, TEGRA210_I2S_SLOT_CTRL, total_slots - 1); in tegra210_i2s_set_slot_ctrl()
56 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL, &val); in tegra210_i2s_set_clock_rate()
62 err = clk_set_rate(i2s->clk_i2s, clock_rate); in tegra210_i2s_set_clock_rate()
69 if (!IS_ERR(i2s->clk_sync_input)) { in tegra210_i2s_set_clock_rate()
75 err = clk_set_rate(i2s->clk_sync_input, clock_rate); in tegra210_i2s_set_clock_rate()
90 struct device *dev = compnt->dev; in tegra210_i2s_sw_reset()
109 regmap_read(i2s->regmap, cif_reg, &cif_ctrl); in tegra210_i2s_sw_reset()
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/linux/Documentation/driver-api/iio/
H A Dbuffers.rst11 The Industrial I/O core offers a way for continuous data capture based on a
12 trigger source. Multiple data channels can be read at once from
23 * :file:`enable`, activate buffer capture.
35 is non *zero*, then a triggered capture will contain data samples for this
52 For example, a driver for a 3-axis accelerometer with 12 bit resolution where
53 data is stored in two 8-bits registers as follows::
56 +---+---+---+---+---+---+---+---+
58 +---+---+---+---+---+---+---+---+
61 +---+---+---+---+---+---+---+---+
63 +---+---+---+---+---+---+---+---+
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/linux/Documentation/devicetree/bindings/media/
H A Dti,da850-vpif.txt2 ----------------------
5 capture and display on the DA850/AM18x family of TI DaVinci/Sitara
12 - compatible: must be "ti,da850-vpif"
13 - reg: physical base address and length of the registers set for the device;
14 - interrupts: should contain IRQ line for the VPIF
16 Video Capture:
18 VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a
19 single 16-bit channel. It should contain one or two port child nodes
21 describe the input and port@1 output channels. Please refer to the
23 Documentation/devicetree/bindings/media/video-interfaces.txt.
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/linux/tools/testing/selftests/alsa/conf.d/
H A DLenovo_ThinkPad_P1_Gen2.conf38 # pcm.0.0 - device 0 subdevice 0
43 access RW_INTERLEAVED # can be omitted - default
44 format S16_LE # can be omitted - default
45 rate 48000 # can be omitted - default
46 channels 2 # can be omitted - default
54 channels 2
62 channels 2
67 CAPTURE {
80 # CAPTURE {
/linux/drivers/pwm/
H A Dpwm-stm32.c1 // SPDX-License-Identifier: GPL-2.0
7 * Inspired by timer-stm32.c from Maxime Coquelin
8 * pwm-atmel.c from Bo Shen
12 #include <linux/mfd/stm32-timers.h>
37 u32 capture[4] ____cacheline_aligned; /* DMA'able buffer */ member
49 regmap_read(dev->regmap, TIM_CCER, &ccer); in active_channels()
68 unsigned int ch = pwm->hwpwm; in stm32_pwm_round_waveform_tohw()
73 if (wf->period_length_ns == 0) { in stm32_pwm_round_waveform_tohw()
81 ret = clk_enable(priv->clk); in stm32_pwm_round_waveform_tohw()
85 wfhw->ccer = TIM_CCER_CCxE(ch + 1); in stm32_pwm_round_waveform_tohw()
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/linux/sound/usb/misc/
H A Dua101.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Edirol UA-101/UA-1000 driver
19 MODULE_DESCRIPTION("Edirol UA-101/1000 driver");
32 * This magic value optimizes memory usage efficiency for the UA-101's packet
55 __stringify(MIN_QUEUE_LENGTH)"-"__stringify(MAX_QUEUE_LENGTH));
92 /* FIFO to synchronize playback rate to capture rate */
105 unsigned int channels; member
121 } capture, playback; member
134 case -ENODEV: in usb_error_string()
136 case -ENOENT: in usb_error_string()
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