| /linux/drivers/gpu/drm/msm/disp/mdp5/ |
| H A D | mdp5_cfg.c | 21 .caps = MDP_CAP_SMP |
41 .caps = MDP_PIPE_CAP_HFLIP |
50 .caps = MDP_PIPE_CAP_HFLIP |
58 .caps = MDP_PIPE_CAP_HFLIP |
67 .caps = MDP_LM_CAP_DISPLAY, },
69 .caps = MDP_LM_CAP_DISPLAY, },
71 .caps = MDP_LM_CAP_DISPLAY, },
73 .caps = MDP_LM_CAP_WB },
75 .caps = MDP_LM_CAP_WB },
110 .caps = MDP_CAP_SMP |
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| H A D | mdp5_pipe.c | 10 uint32_t caps, uint32_t blkcfg, in mdp5_pipe_assign() argument
44 /* skip if doesn't support some required caps: */ in mdp5_pipe_assign()
45 if (caps & ~cur->caps) in mdp5_pipe_assign()
52 if (cur->caps & MDP_PIPE_CAP_CURSOR && in mdp5_pipe_assign()
57 * fewest unneeded caps bits set: in mdp5_pipe_assign()
59 if (!(*hwpipe) || (hweight_long(cur->caps & ~caps) < in mdp5_pipe_assign()
60 hweight_long((*hwpipe)->caps & ~caps))) { in mdp5_pipe_assign()
70 if (r_cur->caps != cur->caps) in mdp5_pipe_assign()
109 DBG("%s: assign to plane %s for caps %x", in mdp5_pipe_assign()
110 (*hwpipe)->name, plane->name, caps); in mdp5_pipe_assign()
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| /linux/net/bluetooth/ |
| H A D | hci_codec.c | 12 void *caps, in hci_codec_list_add() argument
31 memcpy(entry->caps, caps, len); in hci_codec_list_add()
57 struct hci_codec_caps *caps; in hci_read_codec_capabilities() local
65 * then just add codec to the list without caps in hci_read_codec_capabilities()
100 caps = (void *)skb->data; in hci_read_codec_capabilities()
101 if (skb->len < sizeof(*caps)) in hci_read_codec_capabilities()
103 if (skb->len < caps->len) in hci_read_codec_capabilities()
105 len += sizeof(caps->len) + caps->len; in hci_read_codec_capabilities()
106 skb_pull(skb, sizeof(caps->len) + caps->len); in hci_read_codec_capabilities()
126 struct hci_op_read_local_codec_caps caps; in hci_read_supported_codecs() local
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| /linux/drivers/net/ethernet/netronome/nfp/ |
| H A D | nfp_net_ctrl.c | 12 static void nfp_net_tlv_caps_reset(struct nfp_net_tlv_caps *caps) in nfp_net_tlv_caps_reset() argument
14 memset(caps, 0, sizeof(*caps)); in nfp_net_tlv_caps_reset()
15 caps->me_freq_mhz = 1200; in nfp_net_tlv_caps_reset()
16 caps->mbox_off = NFP_NET_CFG_MBOX_BASE; in nfp_net_tlv_caps_reset()
17 caps->mbox_len = NFP_NET_CFG_MBOX_VAL_MAX_SZ; in nfp_net_tlv_caps_reset()
21 nfp_net_tls_parse_crypto_ops(struct device *dev, struct nfp_net_tlv_caps *caps, in nfp_net_tls_parse_crypto_ops() argument
27 if (caps->tls_resync_ss && !rx_stream_scan) in nfp_net_tls_parse_crypto_ops()
37 caps->crypto_ops = readl(data); in nfp_net_tls_parse_crypto_ops()
38 caps->crypto_enable_off = data - ctrl_mem + 16; in nfp_net_tls_parse_crypto_ops()
39 caps->tls_resync_ss = rx_stream_scan; in nfp_net_tls_parse_crypto_ops()
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| /linux/drivers/net/wireless/ath/ath5k/ |
| H A D | caps.c | 35 struct ath5k_capabilities *caps = &ah->ah_capabilities; in ath5k_hw_set_capabilities() local
39 ee_header = caps->cap_eeprom.ee_header; in ath5k_hw_set_capabilities()
46 caps->cap_range.range_5ghz_min = 5120; in ath5k_hw_set_capabilities()
47 caps->cap_range.range_5ghz_max = 5430; in ath5k_hw_set_capabilities()
48 caps->cap_range.range_2ghz_min = 0; in ath5k_hw_set_capabilities()
49 caps->cap_range.range_2ghz_max = 0; in ath5k_hw_set_capabilities()
52 __set_bit(AR5K_MODE_11A, caps->cap_mode); in ath5k_hw_set_capabilities()
69 if (ath_is_49ghz_allowed(caps->cap_eeprom.ee_regdomain)) in ath5k_hw_set_capabilities()
70 caps->cap_range.range_5ghz_min = 4920; in ath5k_hw_set_capabilities()
72 caps->cap_range.range_5ghz_min = 5005; in ath5k_hw_set_capabilities()
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| /linux/drivers/infiniband/hw/hns/ |
| H A D | hns_roce_main.c | 70 if (port >= hr_dev->caps.num_ports) in hns_roce_add_gid()
84 if (port >= hr_dev->caps.num_ports) in hns_roce_del_gid()
103 if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_BOND) { in hns_roce_get_port_state()
183 if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_BOND) { in hns_roce_netdev_event()
189 for (port = 0; port < hr_dev->caps.num_ports; port++) { in hns_roce_netdev_event()
208 for (i = 0; i < hr_dev->caps.num_ports; i++) { in hns_roce_setup_mtu_mac()
226 props->fw_ver = hr_dev->caps.fw_ver; in hns_roce_query_device()
229 props->page_size_cap = hr_dev->caps.page_size_cap; in hns_roce_query_device()
233 props->max_qp = hr_dev->caps.num_qps; in hns_roce_query_device()
234 props->max_qp_wr = hr_dev->caps.max_wqes; in hns_roce_query_device()
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| H A D | hns_roce_hw_v2.c | 1743 hr_dev->caps.fw_ver = (u64)(le32_to_cpu(resp->fw_ver)); in hns_roce_query_fw_ver()
1783 if (port > hr_dev->caps.num_ports) in hns_roce_hw_v2_query_counter()
1847 struct hns_roce_caps *caps = &hr_dev->caps; in load_func_res_caps() local
1868 caps->qpc_bt_num = hr_reg_read(r_a, FUNC_RES_A_QPC_BT_NUM) / func_num; in load_func_res_caps()
1869 caps->srqc_bt_num = hr_reg_read(r_a, FUNC_RES_A_SRQC_BT_NUM) / func_num; in load_func_res_caps()
1870 caps->cqc_bt_num = hr_reg_read(r_a, FUNC_RES_A_CQC_BT_NUM) / func_num; in load_func_res_caps()
1871 caps->mpt_bt_num = hr_reg_read(r_a, FUNC_RES_A_MPT_BT_NUM) / func_num; in load_func_res_caps()
1872 caps->eqc_bt_num = hr_reg_read(r_a, FUNC_RES_A_EQC_BT_NUM) / func_num; in load_func_res_caps()
1873 caps->smac_bt_num = hr_reg_read(r_b, FUNC_RES_B_SMAC_NUM) / func_num; in load_func_res_caps()
1874 caps->sgid_bt_num = hr_reg_read(r_b, FUNC_RES_B_SGID_NUM) / func_num; in load_func_res_caps()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_dwb.c | 45 static bool dwb1_get_caps(struct dwbc *dwbc, struct dwb_caps *caps) in dwb1_get_caps() argument
47 if (caps) { in dwb1_get_caps()
48 caps->adapter_id = 0; /* we only support 1 adapter currently */ in dwb1_get_caps()
49 caps->hw_version = DCN_VERSION_1_0; in dwb1_get_caps()
50 caps->num_pipes = 2; in dwb1_get_caps()
51 memset(&caps->reserved, 0, sizeof(caps->reserved)); in dwb1_get_caps()
52 memset(&caps->reserved2, 0, sizeof(caps->reserved2)); in dwb1_get_caps()
53 caps->sw_version = dwb_ver_1_0; in dwb1_get_caps()
54 caps->caps.support_dwb = true; in dwb1_get_caps()
55 caps->caps.support_ogam = false; in dwb1_get_caps()
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| /linux/arch/powerpc/perf/ |
| H A D | hv-common.c | 8 unsigned long hv_perf_caps_get(struct hv_perf_caps *caps) in hv_perf_caps_get() argument
13 struct hv_gpci_system_performance_capabilities caps; in hv_perf_caps_get() member
31 pr_devel("capability_mask: 0x%x\n", arg.caps.capability_mask); in hv_perf_caps_get()
33 caps->version = arg.params.counter_info_version_out; in hv_perf_caps_get()
34 caps->collect_privileged = !!arg.caps.perf_collect_privileged; in hv_perf_caps_get()
35 caps->ga = !!(arg.caps.capability_mask & HV_GPCI_CM_GA); in hv_perf_caps_get()
36 caps->expanded = !!(arg.caps.capability_mask & HV_GPCI_CM_EXPANDED); in hv_perf_caps_get()
37 caps->lab = !!(arg.caps.capability_mask & HV_GPCI_CM_LAB); in hv_perf_caps_get()
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| /linux/tools/power/cpupower/utils/helpers/ |
| H A D | cpuid.c | 60 cpu_info->caps = 0; in get_cpu_info()
122 cpu_info->caps |= CPUPOWER_CAP_INV_TSC; in get_cpu_info()
126 cpu_info->caps |= CPUPOWER_CAP_APERF; in get_cpu_info()
133 cpu_info->caps |= CPUPOWER_CAP_AMD_CPB; in get_cpu_info()
136 cpu_info->caps |= CPUPOWER_CAP_AMD_CPB_MSR; in get_cpu_info()
142 cpu_info->caps |= CPUPOWER_CAP_AMD_HW_PSTATE; in get_cpu_info()
145 cpu_info->caps |= CPUPOWER_CAP_AMD_PSTATEDEF; in get_cpu_info()
151 cpu_info->caps |= CPUPOWER_CAP_AMD_RDPRU; in get_cpu_info()
154 cpu_info->caps |= CPUPOWER_CAP_AMD_PSTATE; in get_cpu_info()
160 cpu_info->caps &= ~CPUPOWER_CAP_AMD_CPB; in get_cpu_info()
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| /linux/arch/powerpc/platforms/pseries/ |
| H A D | vas-sysfs.c | 23 struct vas_cop_feat_caps *caps; member
32 static ssize_t update_total_credits_store(struct vas_cop_feat_caps *caps, in update_total_credits_store() argument
48 err = vas_reconfig_capabilties(caps->win_type, creds); in update_total_credits_store()
59 static ssize_t _name##_show(struct vas_cop_feat_caps *caps, char *buf) \
61 return sprintf(buf, "%d\n", atomic_read(&caps->_name)); \
125 struct vas_cop_feat_caps *caps; in vas_type_show() local
129 caps = centry->caps; in vas_type_show()
135 return entry->show(caps, buf); in vas_type_show()
142 struct vas_cop_feat_caps *caps; in vas_type_store() local
146 caps = centry->caps; in vas_type_store()
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| H A D | vas.c | 323 struct vas_caps *caps; in vas_allocate_window() local
356 caps = &vascaps[VAS_GZIP_QOS_FEAT_TYPE]; in vas_allocate_window()
358 caps = &vascaps[VAS_GZIP_DEF_FEAT_TYPE]; in vas_allocate_window()
360 cop_feat_caps = &caps->caps; in vas_allocate_window()
414 caps->nr_open_wins_progress++; in vas_allocate_window()
450 if (!caps->nr_close_wins && !migration_in_progress) { in vas_allocate_window()
451 list_add(&txwin->win_list, &caps->list); in vas_allocate_window()
452 caps->nr_open_windows++; in vas_allocate_window()
453 caps->nr_open_wins_progress--; in vas_allocate_window()
475 caps->nr_open_wins_progress--; in vas_allocate_window()
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| /linux/drivers/gpu/drm/arm/display/komeda/ |
| H A D | komeda_format_caps.c | 16 const struct komeda_format_caps *caps; in komeda_get_format_caps() local
22 caps = &table->format_caps[id]; in komeda_get_format_caps()
24 if (fourcc != caps->fourcc) in komeda_get_format_caps()
27 if ((modifier == 0ULL) && (caps->supported_afbc_layouts == 0)) in komeda_get_format_caps()
28 return caps; in komeda_get_format_caps()
30 if (has_bits(afbc_features, caps->supported_afbc_features) && in komeda_get_format_caps()
31 has_bit(afbc_layout, caps->supported_afbc_layouts)) in komeda_get_format_caps()
32 return caps; in komeda_get_format_caps()
99 const struct komeda_format_caps *caps; in komeda_format_mod_supported() local
101 caps = komeda_get_format_caps(table, fourcc, modifier); in komeda_format_mod_supported()
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| /linux/drivers/gpu/drm/amd/display/dc/dwb/dcn30/ |
| H A D | dcn30_dwb.c | 46 static bool dwb3_get_caps(struct dwbc *dwbc, struct dwb_caps *caps) in dwb3_get_caps() argument
48 if (caps) { in dwb3_get_caps()
49 caps->adapter_id = 0; /* we only support 1 adapter currently */ in dwb3_get_caps()
50 caps->hw_version = DCN_VERSION_3_0; in dwb3_get_caps()
51 caps->num_pipes = 2; in dwb3_get_caps()
52 memset(&caps->reserved, 0, sizeof(caps->reserved)); in dwb3_get_caps()
53 memset(&caps->reserved2, 0, sizeof(caps->reserved2)); in dwb3_get_caps()
54 caps->sw_version = dwb_ver_2_0; in dwb3_get_caps()
55 caps->caps.support_dwb = true; in dwb3_get_caps()
56 caps->caps.support_ogam = true; in dwb3_get_caps()
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| /linux/drivers/net/ethernet/mellanox/mlx5/core/steering/hws/ |
| H A D | debug.c | 272 struct mlx5hws_cmd_query_caps *caps = ctx->caps; in hws_debug_dump_context_caps() local
277 caps->fw_ver, in hws_debug_dump_context_caps()
278 caps->wqe_based_update, in hws_debug_dump_context_caps()
279 caps->ste_format, in hws_debug_dump_context_caps()
280 caps->ste_alloc_log_max, in hws_debug_dump_context_caps()
281 caps->log_header_modify_argument_max_alloc); in hws_debug_dump_context_caps()
284 caps->flex_protocols, in hws_debug_dump_context_caps()
285 caps->rtc_reparse_mode, in hws_debug_dump_context_caps()
286 caps->rtc_index_mode, in hws_debug_dump_context_caps()
287 caps->ste_alloc_log_gran, in hws_debug_dump_context_caps()
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-class-intel_pmt-features | 29 caps
70 │ ├── caps
76 │ ├── caps
81 │ ├── caps
87 │ ├── caps
94 │ ├── caps
97 │ ├── caps
100 │ ├── caps
111 - The `caps` file provides additional information about the functionality
114 Example 'caps' content for the 'tracing' feature:
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| /linux/drivers/mtd/nand/ |
| H A D | ecc-mtk.c | 60 const struct mtk_ecc_caps *caps; member
146 dec = readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECIRQ_STA]) in mtk_ecc_irq()
149 dec = readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECDONE]); in mtk_ecc_irq()
155 readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECIRQ_STA]); in mtk_ecc_irq()
162 enc = readl(ecc->regs + ecc->caps->ecc_regs[ECC_ENCIRQ_STA]) in mtk_ecc_irq()
178 for (i = 0; i < ecc->caps->num_ecc_strength; i++) { in mtk_ecc_config()
179 if (ecc->caps->ecc_strength[i] == config->strength) in mtk_ecc_config()
183 if (i == ecc->caps->num_ecc_strength) { in mtk_ecc_config()
195 reg = ecc_bit | (config->mode << ecc->caps->ecc_mode_shift); in mtk_ecc_config()
206 config->strength * ecc->caps->parity_bits; in mtk_ecc_config()
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| /linux/drivers/vfio/pci/ |
| H A D | vfio_pci_zdev.c | 23 static int zpci_base_cap(struct zpci_dev *zdev, struct vfio_info_cap *caps) in zpci_base_cap() argument
38 return vfio_info_add_capability(caps, &cap.header, sizeof(cap)); in zpci_base_cap()
44 static int zpci_group_cap(struct zpci_dev *zdev, struct vfio_info_cap *caps) in zpci_group_cap() argument
60 return vfio_info_add_capability(caps, &cap.header, sizeof(cap)); in zpci_group_cap()
66 static int zpci_util_cap(struct zpci_dev *zdev, struct vfio_info_cap *caps) in zpci_util_cap() argument
81 ret = vfio_info_add_capability(caps, &cap->header, cap_size); in zpci_util_cap()
91 static int zpci_pfip_cap(struct zpci_dev *zdev, struct vfio_info_cap *caps) in zpci_pfip_cap() argument
106 ret = vfio_info_add_capability(caps, &cap->header, cap_size); in zpci_pfip_cap()
117 struct vfio_info_cap *caps) in vfio_pci_info_zdev_add_caps() argument
125 ret = zpci_base_cap(zdev, caps); in vfio_pci_info_zdev_add_caps()
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| /linux/sound/soc/codecs/ |
| H A D | mt6359-accdet.c | 80 if (priv->caps & ACCDET_PMIC_EINT0) { in adjust_eint_analog_setting()
86 } else if (priv->caps & ACCDET_PMIC_EINT1) { in adjust_eint_analog_setting()
107 if (priv->caps & ACCDET_PMIC_EINT0) { in adjust_eint_digital_setting()
112 } else if (priv->caps & ACCDET_PMIC_EINT1) { in adjust_eint_digital_setting()
120 if (priv->caps & ACCDET_PMIC_EINT0) { in adjust_eint_digital_setting()
125 } else if (priv->caps & ACCDET_PMIC_EINT1) { in adjust_eint_digital_setting()
162 if (priv->caps & ACCDET_PMIC_EINT0) { in recover_eint_analog_setting()
167 } else if (priv->caps & ACCDET_PMIC_EINT1) { in recover_eint_analog_setting()
180 if (priv->caps & ACCDET_PMIC_EINT0) { in recover_eint_digital_setting()
184 } else if (priv->caps & ACCDET_PMIC_EINT1) { in recover_eint_digital_setting()
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| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_dwb.c | 50 static bool dwb2_get_caps(struct dwbc *dwbc, struct dwb_caps *caps) in dwb2_get_caps() argument
53 if (caps) { in dwb2_get_caps()
54 caps->adapter_id = 0; /* we only support 1 adapter currently */ in dwb2_get_caps()
55 caps->hw_version = DCN_VERSION_2_0; in dwb2_get_caps()
56 caps->num_pipes = 1; in dwb2_get_caps()
57 memset(&caps->reserved, 0, sizeof(caps->reserved)); in dwb2_get_caps()
58 memset(&caps->reserved2, 0, sizeof(caps->reserved2)); in dwb2_get_caps()
59 caps->sw_version = dwb_ver_1_0; in dwb2_get_caps()
60 caps->caps.support_dwb = true; in dwb2_get_caps()
61 caps->caps.support_ogam = false; in dwb2_get_caps()
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| /linux/security/apparmor/ |
| H A D | capability.c | 81 !cap_raised(rules->caps.audit, cap))) in audit_caps()
85 cap_raised(rules->caps.kill, cap)) { in audit_caps()
87 } else if (cap_raised(rules->caps.quiet, cap) && in audit_caps()
133 /* caps broken into 256 x 32 bit permission chunks */ in profile_capable()
149 /* fallback to old caps mediation that doesn't support conditionals */ in profile_capable()
150 if (cap_raised(rules->caps.allow, cap) && in profile_capable()
151 !cap_raised(rules->caps.denied, cap)) in profile_capable()
201 kernel_cap_t caps = CAP_EMPTY_SET; in aa_profile_capget() local
204 /* caps broken into up to 256, 32 bit permission chunks */ in aa_profile_capget()
212 caps.val |= ((u64)(perms.allow)) << (i * 5); in aa_profile_capget()
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| /linux/drivers/net/ethernet/marvell/prestera/ |
| H A D | prestera_ethtool.c | 315 if (port->caps.type < PRESTERA_PORT_TYPE_MAX) in prestera_port_type_get()
316 return port_types[port->caps.type].eth_type; in prestera_port_type_get()
335 if (type == port->caps.type) in prestera_port_type_set()
337 if (type != port->caps.type && ecmd->base.autoneg == AUTONEG_ENABLE) in prestera_port_type_set()
344 port->caps.supp_link_modes) && in prestera_port_type_set()
353 port->caps.type = type; in prestera_port_type_set()
419 port->caps.supp_link_modes) == 0) in prestera_port_supp_types_get()
441 netdev_warn(port->dev, "Remote link caps get failed %d", in prestera_port_remote_cap_get()
442 port->caps.transceiver); in prestera_port_remote_cap_get()
529 if (port->caps.type == PRESTERA_PORT_TYPE_TP) { in prestera_ethtool_get_link_ksettings()
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| /linux/drivers/media/platform/qcom/venus/ |
| H A D | hfi_parser.h | 19 struct hfi_plat_caps *caps; in get_cap() local
22 caps = venus_caps_by_codec(core, inst->hfi_codec, inst->session_type); in get_cap()
23 if (!caps) in get_cap()
26 for (i = 0; i < caps->num_caps; i++) { in get_cap()
27 if (caps->caps[i].capability_type == type) { in get_cap()
28 cap = &caps->caps[i]; in get_cap()
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| /linux/drivers/crypto/marvell/cesa/ |
| H A D | cesa.c | 195 for (i = 0; i < cesa->caps->ncipher_algs; i++) { in mv_cesa_add_algs()
196 ret = crypto_register_skcipher(cesa->caps->cipher_algs[i]); in mv_cesa_add_algs()
201 for (i = 0; i < cesa->caps->nahash_algs; i++) { in mv_cesa_add_algs()
202 ret = crypto_register_ahash(cesa->caps->ahash_algs[i]); in mv_cesa_add_algs()
211 crypto_unregister_ahash(cesa->caps->ahash_algs[j]); in mv_cesa_add_algs()
212 i = cesa->caps->ncipher_algs; in mv_cesa_add_algs()
216 crypto_unregister_skcipher(cesa->caps->cipher_algs[j]); in mv_cesa_add_algs()
225 for (i = 0; i < cesa->caps->nahash_algs; i++) in mv_cesa_remove_algs()
226 crypto_unregister_ahash(cesa->caps->ahash_algs[i]); in mv_cesa_remove_algs()
228 for (i = 0; i < cesa->caps->ncipher_algs; i++) in mv_cesa_remove_algs()
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| /linux/drivers/net/ethernet/sfc/siena/ |
| H A D | mcdi_port_common.c | 356 static u32 mcdi_fec_caps_to_ethtool(u32 caps, bool is_25g) in mcdi_fec_caps_to_ethtool() argument
358 bool rs = caps & (1 << MC_CMD_PHY_CAP_RS_FEC_LBN), in mcdi_fec_caps_to_ethtool()
359 rs_req = caps & (1 << MC_CMD_PHY_CAP_RS_FEC_REQUESTED_LBN), in mcdi_fec_caps_to_ethtool()
360 baser = is_25g ? caps & (1 << MC_CMD_PHY_CAP_25G_BASER_FEC_LBN) in mcdi_fec_caps_to_ethtool()
361 : caps & (1 << MC_CMD_PHY_CAP_BASER_FEC_LBN), in mcdi_fec_caps_to_ethtool()
362 baser_req = is_25g ? caps & (1 << MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_LBN) in mcdi_fec_caps_to_ethtool()
363 : caps & (1 << MC_CMD_PHY_CAP_BASER_FEC_REQUESTED_LBN); in mcdi_fec_caps_to_ethtool()
429 u32 caps; in efx_siena_mcdi_phy_probe() local
461 caps = MCDI_DWORD(outbuf, GET_LINK_OUT_CAP); in efx_siena_mcdi_phy_probe()
462 if (caps & (1 << MC_CMD_PHY_CAP_AN_LBN)) in efx_siena_mcdi_phy_probe()
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