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/linux/drivers/power/supply/
H A Dsamsung-sdi-battery.c428 * so this represents the capacity ratio at different temperatures.
446 * Capacity tables for different Open Circuit Voltages (OCV).
451 { .ocv = 4330000, .capacity = 100},
452 { .ocv = 4320000, .capacity = 99},
453 { .ocv = 4283000, .capacity = 95},
454 { .ocv = 4246000, .capacity = 92},
455 { .ocv = 4211000, .capacity = 89},
456 { .ocv = 4167000, .capacity = 85},
457 { .ocv = 4146000, .capacity = 83},
458 { .ocv = 4124000, .capacity = 81},
[all …]
H A Dab8500_bmdata.c20 { .ocv = 4186000, .capacity = 100},
21 { .ocv = 4163000, .capacity = 99},
22 { .ocv = 4114000, .capacity = 95},
23 { .ocv = 4068000, .capacity = 90},
24 { .ocv = 3990000, .capacity = 80},
25 { .ocv = 3926000, .capacity = 70},
26 { .ocv = 3898000, .capacity = 65},
27 { .ocv = 3866000, .capacity = 60},
28 { .ocv = 3833000, .capacity = 55},
29 { .ocv = 3812000, .capacity = 50},
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H A Dab8500-bm.h283 * @user_cap_limit Capacity reported from user must be within this
331 * struct ab8500_bm_capacity_levels - ab8500 capacity level data
332 * @critical: critical capacity level in percent
333 * @low: low capacity level in percent
334 * @normal: normal capacity level in percent
335 * @high: high capacity level in percent
336 * @full: full capacity level in percent
370 * @capacity_scaling indicates whether capacity scaling is to be used
379 * @cap_levels capacity in percent for the different capacity levels
/linux/Documentation/scheduler/
H A Dsched-capacity.rst2 Capacity Aware Scheduling
5 1. CPU Capacity
16 CPU capacity is a measure of the performance a CPU can reach, normalized against
18 asymmetric CPU capacity systems, as they contain CPUs of different capacities.
20 Disparity in maximum attainable performance (IOW in maximum CPU capacity) stems
36 capacity(cpu) = work_per_hz(cpu) * max_freq(cpu)
41 Two different capacity values are used within the scheduler. A CPU's
42 ``original capacity`` is its maximum attainable capacity, i.e. its maximum
43 attainable performance level. This original capacity is returned by
44 the function arch_scale_cpu_capacity(). A CPU's ``capacity`` is its ``original
[all …]
/linux/drivers/gpu/drm/amd/display/dc/basics/
H A Dvector.c32 uint32_t capacity, in dal_vector_construct() argument
37 if (!struct_size || !capacity) { in dal_vector_construct()
43 vector->container = kcalloc(capacity, struct_size, GFP_KERNEL); in dal_vector_construct()
46 vector->capacity = capacity; in dal_vector_construct()
86 vector->capacity = count; in dal_vector_presized_costruct()
114 uint32_t capacity, in dal_vector_create()
122 if (dal_vector_construct(vector, ctx, capacity, struct_size)) in dal_vector_create()
135 vector->capacity = 0; in dal_vector_destruct()
210 if (vector->count == vector->capacity) { in dal_vector_insert_at()
113 dal_vector_create(struct dc_context * ctx,uint32_t capacity,uint32_t struct_size) dal_vector_create() argument
284 dal_vector_reserve(struct vector * vector,uint32_t capacity) dal_vector_reserve() argument
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/linux/Documentation/translations/zh_CN/scheduler/
H A Dsched-capacity.rst4 :Original: Documentation/scheduler/sched-capacity.rst
27 我们引入CPU算力（capacity）的概念来测量每个CPU能达到的性能，它的值相对系统中性能最强的CPU
42 capacity(cpu) = work_per_hz(cpu) * max_freq(cpu)
48 CPU的 ``capacity`` 是 ``capacity_orig`` 扣除了一些性能损失（比如处理中断的耗时）的值。
50 注意CPU的 ``capacity`` 仅仅被设计用于CFS调度类，而 ``capacity_orig`` 是不感知调度类的。为
51 简洁起见，本文档的剩余部分将不加区分的使用术语 ``capacity`` 和 ``capacity_orig`` 。
67 - capacity(CPU0) = C
68 - capacity(CPU1) = C/2
98 - capacity(CPU0) = C
99 - capacity(CPU1) = C/3
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/linux/arch/arm/kernel/
H A Dtopology.c34 * cpu capacity scale management
38 * cpu capacity table
39 * This per cpu data structure describes the relative capacity of each core.
40 * On a heteregenous system, cores don't have the same computation capacity
61 * is used to compute the capacity of a CPU.
82 * 'average' CPU is of middle capacity. Also see the comments near
91 unsigned long capacity = 0; in parse_dt_topology() local
128 capacity = ((be32_to_cpup(rate)) >> 20) * cpu_eff->efficiency; in parse_dt_topology()
130 /* Save min capacity of the system */ in parse_dt_topology()
131 if (capacity < min_capacity) in parse_dt_topology()
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/linux/Documentation/devicetree/bindings/cpu/
H A Dcpu-capacity.txt2 CPU capacity bindings
15 2 - CPU capacity definition
18 CPU capacity is a number that provides the scheduler information about CPUs
27 final capacity should, however, be:
43 3 - capacity-dmips-mhz
46 capacity-dmips-mhz is an optional cpu node [1] property: u32 value
47 representing CPU capacity expressed in normalized DMIPS/MHz. At boot time, the
48 maximum frequency available to the cpu is then used to calculate the capacity
51 capacity-dmips-mhz property is all-or-nothing: if it is specified for a cpu
53 fall back to the default capacity value for every CPU. If cpufreq is not
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/linux/drivers/misc/vmw_vmci/
H A Dvmci_handle_array.c11 struct vmci_handle_arr *vmci_handle_arr_create(u32 capacity, u32 max_capacity) in vmci_handle_arr_create() argument
15 if (max_capacity == 0 || capacity > max_capacity) in vmci_handle_arr_create()
18 if (capacity == 0) in vmci_handle_arr_create()
19 capacity = min((u32)VMCI_HANDLE_ARRAY_DEFAULT_CAPACITY, in vmci_handle_arr_create()
22 array = kmalloc_flex(*array, entries, capacity, GFP_ATOMIC); in vmci_handle_arr_create()
26 array->capacity = capacity; in vmci_handle_arr_create()
43 if (unlikely(array->size >= array->capacity)) { in vmci_handle_arr_append_entry()
46 u32 capacity_bump = min(array->max_capacity - array->capacity, in vmci_handle_arr_append_entry()
47 array->capacity); in vmci_handle_arr_append_entry()
49 size_add(array->capacity, capacity_bump)); in vmci_handle_arr_append_entry()
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H A Dvmci_handle_array.h16 u32 capacity; member
20 struct vmci_handle entries[] __counted_by(capacity);
23 /* Select a default capacity that results in a 64 byte sized array */
26 struct vmci_handle_arr *vmci_handle_arr_create(u32 capacity, u32 max_capacity);
/linux/Documentation/driver-api/cxl/allocation/
H A Dhugepages.rst10 as the NUMA node hosting that capacity will be `Online` at the time CMA
11 carves out contiguous capacity.
14 capacity allocated by CMA - as the NUMA node hosting the capacity is `Offline`
15 at :code:`__init` time - when CMA carves out contiguous capacity.
23 All CXL capacity regardless of configuration time or memory zone is eligible
28 CXL capacity onlined in :code:`ZONE_NORMAL` is eligible for 1GB Gigantic Page
31 CXL capacity onlined in :code:`ZONE_MOVABLE` is not eligible for 1GB Gigantic
/linux/Documentation/driver-api/cxl/linux/
H A Dmemory-hotplug.rst32 :code:`ZONE_NORMAL` implies this capacity may be used for almost any allocation,
33 while :code:`ZONE_MOVABLE` implies this capacity should only be used for
37 so that it the entire region may be hot-unplugged at a later time. Any capacity
45 capacity exceeds 64GB. As of v6.15, Linux does not take into account the
52 memory capacity are dictated by the following system settings:
58 capacity will be carved out of the memory block being onlined. This has
62 If either parameter is set to false, :code:`struct folio` for this capacity
64 procedure. This capacity will be allocated from :code:`ZONE_NORMAL` on
69 :code:`ZONE_NORMAL` capacity to host the memory map for the hotplugged capacity.
/linux/kernel/cgroup/
H A Dmisc.c37 * Miscellaneous resources capacity for the entire machine. 0 capacity means
40 * root_cg.max and capacity are independent of each other. root_cg.max can be
41 * more than the actual capacity. We are using Limits resource distribution
75 * misc_cg_set_capacity() - Set the capacity of the misc cgroup res.
77 * @capacity: Supported capacity of the misc res on the host.
79 * If capacity is 0 then the charging a misc cgroup fails for that type.
83 * * %0 - Successfully registered the capacity.
86 int misc_cg_set_capacity(enum misc_res_type type, u64 capacity) in misc_cg_set_capacity() argument
91 WRITE_ONCE(misc_res_capacity[type], capacity); in misc_cg_set_capacity()
148 * * -EINVAL - If @type is invalid or misc res has 0 capacity.
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/linux/rust/kernel/alloc/
H A Dkvec.rs79 /// capacity of the vector (the number of elements that currently fit into the vector), its length
97 /// without re-allocation. For ZSTs `self.layout`'s capacity is zero. However, it is legal for the
100 /// - `self.len()` is always less than or equal to `self.capacity()`.
108 /// Note: This isn't quite the same as `Self::capacity`, which in contrast returns the number of
181 pub const fn capacity(&self) -> usize { in capacity() function
199 /// - `additional` must be less than or equal to `self.capacity - self.len`.
204 debug_assert!(additional <= self.capacity() - self.len()); in inc_len()
288 // - `layout` is an empty `ArrayLayout` (zero capacity) in new()
299 /// Returns a slice of `MaybeUninit<T>` for the remaining spare capacity of the vector.
302 // - `self.len` is smaller than `self.capacity` by the type invariant and hence, the in spare_capacity_mut()
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/linux/lib/
H A Dobjpool.c24 void *obj = (void *)&slot->entries[pool->capacity]; in objpool_init_percpu_slot()
28 slot->mask = pool->capacity - 1; in objpool_init_percpu_slot()
68 size = struct_size(slot, entries, pool->capacity) + in objpool_init_percpu_slots()
122 int rc, capacity, slot_size; in objpool_init() local
132 /* calculate capacity of percpu objpool_slot */ in objpool_init()
133 capacity = roundup_pow_of_two(nr_objs); in objpool_init()
134 if (!capacity) in objpool_init()
141 pool->capacity = capacity; in objpool_init()
/linux/arch/arm/boot/dts/samsung/
H A Dexynos5422-cpus.dtsi65 capacity-dmips-mhz = <539>;
78 capacity-dmips-mhz = <539>;
91 capacity-dmips-mhz = <539>;
104 capacity-dmips-mhz = <539>;
117 capacity-dmips-mhz = <1024>;
130 capacity-dmips-mhz = <1024>;
143 capacity-dmips-mhz = <1024>;
156 capacity-dmips-mhz = <1024>;
H A Dexynos5420-cpus.dtsi66 capacity-dmips-mhz = <1024>;
78 capacity-dmips-mhz = <1024>;
90 capacity-dmips-mhz = <1024>;
102 capacity-dmips-mhz = <1024>;
114 capacity-dmips-mhz = <539>;
126 capacity-dmips-mhz = <539>;
138 capacity-dmips-mhz = <539>;
150 capacity-dmips-mhz = <539>;
/linux/drivers/base/
H A Darch_topology.c168 * @cpus : The related CPUs for which capacity has been reduced
183 unsigned long max_capacity, capacity, pressure; in topology_update_hw_pressure() local
196 capacity = max_capacity; in topology_update_hw_pressure()
198 capacity = mult_frac(max_capacity, capped_freq, max_freq); in topology_update_hw_pressure()
200 pressure = max_capacity - capacity; in topology_update_hw_pressure()
243 u64 capacity; in topology_normalize_cpu_scale() local
252 capacity = raw_capacity[cpu] * in topology_normalize_cpu_scale()
254 capacity_scale = max(capacity, capacity_scale); in topology_normalize_cpu_scale()
259 capacity = raw_capacity[cpu] * in topology_normalize_cpu_scale()
261 capacity = div64_u64(capacity << SCHED_CAPACITY_SHIFT, in topology_normalize_cpu_scale()
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/linux/kernel/sched/
H A Dpelt.h16 int update_hw_load_avg(u64 now, struct rq *rq, u64 capacity);
24 update_hw_load_avg(u64 now, struct rq *rq, u64 capacity) in update_hw_load_avg() argument
95 * @ max capacity ------******---------------******---------------
96 * @ half capacity ------************---------************---------
108 * When a rq runs at a lower compute capacity, it will need in update_rq_clock_pelt()
110 * capacity. In order to be invariant, we scale the delta to in update_rq_clock_pelt()
113 * disturb the load signal compared to max capacity. This in update_rq_clock_pelt()
147 * phase would be present at max capacity. As soon as the in update_idle_rq_clock_pelt()
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_plane.c405 uint64_t *capacity) in amdgpu_dm_plane_add_gfx10_1_modifiers() argument
409 amdgpu_dm_plane_add_modifier(mods, size, capacity, AMD_FMT_MOD | in amdgpu_dm_plane_add_gfx10_1_modifiers()
418 amdgpu_dm_plane_add_modifier(mods, size, capacity, AMD_FMT_MOD | in amdgpu_dm_plane_add_gfx10_1_modifiers()
428 amdgpu_dm_plane_add_modifier(mods, size, capacity, AMD_FMT_MOD | in amdgpu_dm_plane_add_gfx10_1_modifiers()
433 amdgpu_dm_plane_add_modifier(mods, size, capacity, AMD_FMT_MOD | in amdgpu_dm_plane_add_gfx10_1_modifiers()
440 amdgpu_dm_plane_add_modifier(mods, size, capacity, AMD_FMT_MOD | in amdgpu_dm_plane_add_gfx10_1_modifiers()
444 amdgpu_dm_plane_add_modifier(mods, size, capacity, AMD_FMT_MOD | in amdgpu_dm_plane_add_gfx10_1_modifiers()
452 uint64_t *capacity) in amdgpu_dm_plane_add_gfx9_modifiers() argument
473 amdgpu_dm_plane_add_modifier(mods, size, capacity, AMD_FMT_MOD | in amdgpu_dm_plane_add_gfx9_modifiers()
484 amdgpu_dm_plane_add_modifier(mods, size, capacity, AMD_FMT_MO in amdgpu_dm_plane_add_gfx9_modifiers()
559 amdgpu_dm_plane_add_gfx10_3_modifiers(const struct amdgpu_device * adev,uint64_t ** mods,uint64_t * size,uint64_t * capacity) amdgpu_dm_plane_add_gfx10_3_modifiers() argument
631 amdgpu_dm_plane_add_gfx11_modifiers(struct amdgpu_device * adev,uint64_t ** mods,uint64_t * size,uint64_t * capacity) amdgpu_dm_plane_add_gfx11_modifiers() argument
696 amdgpu_dm_plane_add_gfx12_modifiers(struct amdgpu_device * adev,uint64_t ** mods,uint64_t * size,uint64_t * capacity) amdgpu_dm_plane_add_gfx12_modifiers() argument
729 uint64_t size = 0, capacity = 128; amdgpu_dm_plane_get_plane_modifiers() local
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/linux/drivers/md/dm-vdo/indexer/
H A Dsparse-cache.c138 u8 capacity; member
156 unsigned int capacity; member
242 (cache->capacity * sizeof(struct cached_chapter_index *))); in make_search_list()
247 list->capacity = cache->capacity; in make_search_list()
250 for (i = 0; i < list->capacity; i++) in make_search_list()
257 int uds_make_sparse_cache(const struct index_geometry *geometry, unsigned int capacity,
265 bytes = (sizeof(struct sparse_cache) + (capacity * sizeof(struct cached_chapter_index))); in uds_make_sparse_cache()
271 cache->capacity = capacity; in uds_make_sparse_cache()
258 uds_make_sparse_cache(const struct index_geometry * geometry,unsigned int capacity,unsigned int zone_count,struct sparse_cache ** cache_ptr) uds_make_sparse_cache() argument
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/linux/rust/kernel/
H A Did_pool.rs14 /// The capacity of the ID pool may be adjusted by users as
98 /// The pool will have a capacity of [`MAX_INLINE_LEN`].
110 /// A capacity below [`MAX_INLINE_LEN`] is adjusted to [`MAX_INLINE_LEN`].
122 pub fn capacity(&self) -> usize { in capacity() method
128 /// The capacity of an [`IdPool`] cannot be shrunk below [`MAX_INLINE_LEN`].
148 /// assert_eq!(pool.capacity(), BitmapVec::MAX_INLINE_LEN);
153 let cap = self.capacity(); in shrink_request()
195 /// The capacity of an [`IdPool`] cannot be grown above [`MAX_LEN`].
200 let num_ids = self.capacity() * 2; in grow_request()
214 // another thread may have already grown the capacity. in grow()
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/linux/arch/x86/kernel/cpu/
H A Daperfmperf.c360 unsigned long capacity; member
367 * arch_enable_hybrid_capacity_scale() - Enable hybrid CPU capacity scaling
369 * Allocate memory for per-CPU data used by hybrid CPU capacity scaling,
379 WARN_ONCE(1, "Hybrid CPU capacity scaling already enabled"); in arch_enable_hybrid_capacity_scale()
388 per_cpu_ptr(arch_cpu_scale, cpu)->capacity = SCHED_CAPACITY_SCALE; in arch_enable_hybrid_capacity_scale()
394 pr_info("Hybrid CPU capacity scaling enabled\n"); in arch_enable_hybrid_capacity_scale()
402 * @cap: Capacity of @cpu at its maximum frequency, relative to @max_cap.
403 * @max_cap: System-wide maximum CPU capacity.
412 * to let the scheduler know that capacity-aware scheduling can be used going
419 WRITE_ONCE(per_cpu_ptr(arch_cpu_scale, cpu)->capacity, in arch_set_cpu_capacity()
[all …]
/linux/include/linux/usb/
H A Dljca.h75 * @capacity: ljca i2c client device capacity
80 u8 capacity; member
88 * @capacity: ljca spi client device capacity
92 u8 capacity; member
/linux/include/linux/sched/
H A Dsd_flags.h89 * NEEDS_GROUPS: Per-CPU capacity is asymmetric between groups.
95 * capacity values.
99 * NEEDS_GROUPS: Per-CPU capacity is asymmetric between groups.
104 * Domain members share CPU capacity (i.e. SMT)
107 * CPU capacity.
108 * NEEDS_GROUPS: Capacity is shared between groups.

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