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/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dmmci.txt4 reading and writing to MultiMedia and SD cards alike.
11 - compatible : contains "arm,pl18x", "arm,primecell".
12 - vmmc-supply : phandle to the regulator device tree node, mentioned
13 as the VCC/VDD supply in the eMMC/SD specs.
16 - arm,primecell-periphid : contains the PrimeCell Peripheral ID, it overrides
18 - resets : phandle to internal reset line.
20 - vqmmc-supply : phandle to the regulator device tree node, mentioned
21 as the VCCQ/VDD_IO supply in the eMMC/SD specs.
23 - st,sig-dir-dat0 : bus signal direction pin used for DAT[0].
24 - st,sig-dir-dat2 : bus signal direction pin used for DAT[2].
[all …]
H A Darm,pl18x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Ulf Hansson <ulf.hansson@linaro.org>
15 reading and writing to MultiMedia and SD cards alike. Over the years
16 vendors have use the VHDL code from ARM to create derivative MMC/SD/SDIO
20 - $ref: /schemas/arm/primecell.yaml#
21 - $ref: mmc-controller.yaml#
29 - arm,pl180
[all …]
H A Dingenic,mmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: mmc-controller.yaml#
18 - enum:
19 - ingenic,jz4740-mmc
20 - ingenic,jz4725b-mmc
21 - ingenic,jz4760-mmc
22 - ingenic,jz4775-mmc
[all …]
H A Dk3-dw-mshc.txt4 Read synopsys-dw-mshc.txt for more details
7 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents
9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific
15 - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions.
16 - "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc": for controllers
18 - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions.
19 - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions.
22 - hisilicon,peripheral-syscon: phandle of syscon used to control peripheral.
30 compatible = "hisilicon,hi4511-dw-mshc";
33 #address-cells = <1>;
[all …]
H A Dcavium-mmc.txt3 The highspeed MMC host controller on Caviums SoCs provides an interface
4 for MMC and SD types of memory cards.
7 as the speed of SD standard 4.0. Only 3.3 Volt is supported.
10 - compatible : should be one of:
11 cavium,octeon-6130-mmc
12 cavium,octeon-7890-mmc
13 cavium,thunder-8190-mmc
14 cavium,thunder-8390-mmc
15 mmc-slot
16 - reg : mmc controller base registers
[all …]
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-msm8660.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8660.h>
7 #include <dt-bindings/soc/qcom,gsbi.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 interrupt-parent = <&intc>;
17 #address-cells = <1>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Dpx30-firefly-jd4-core-mb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/leds/common.h>
9 #include "px30-firefly-jd4-core.dtsi"
12 compatible = "firefly,px30-jd4-core-mb", "firefly,px30-jd4-core",
14 model = "Firefly Core-PX30-JD4 on MB-JD4-PX30 baseboard";
24 stdout-path = "serial2:115200n8";
27 dc_12v: dc-12v-regulator {
28 compatible = "regulator-fixed";
[all …]
H A Drk3566-radxa-zero-3w.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include "rk3566-radxa-zero-3.dtsi"
9 compatible = "radxa,zero-3w", "rockchip,rk3566";
17 sdio_pwrseq: sdio-pwrseq {
18 compatible = "mmc-pwrseq-simple";
20 clock-names = "ext_clock";
21 pinctrl-names = "default";
22 pinctrl-0 = <&wifi_reg_on_h>;
23 post-power-on-delay-ms = <100>;
[all …]
H A Drk3308-rock-s0.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/leds/common.h>
10 compatible = "radxa,rock-s0", "rockchip,rk3308";
20 stdout-path = "serial0:1500000n8";
24 compatible = "gpio-leds";
25 pinctrl-names = "default";
26 pinctrl-0 = <&pwr_led>;
28 led-green {
30 default-state = "on";
[all …]
H A Drk3308-rock-pi-s.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
24 stdout-path = "serial0:1500000n8";
28 compatible = "gpio-leds";
29 pinctrl-names = "default";
30 pinctrl-0 = <&green_led>, <&heartbeat_led>;
32 green-led {
34 default-state = "on";
38 linux,default-trigger = "default-on";
[all …]
H A Drk3308-roc-cc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
10 model = "Firefly ROC-RK3308-CC board";
11 compatible = "firefly,roc-rk3308-cc", "rockchip,rk3308";
19 stdout-path = "serial2:1500000n8";
22 ir-receiver {
23 compatible = "gpio-ir-receiver";
25 pinctrl-names = "default";
26 pinctrl-0 = <&ir_recv_pin>;
30 compatible = "pwm-ir-tx";
[all …]
H A Drk3568-fastrhino-r66s.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include "rk3568-fastrhino-r66s.dtsi"
7 compatible = "lunzn,fastrhino-r66s", "rockchip,rk3568";
15 vccio3-supply = <&vccio_sd>;
19 bus-width = <4>;
20 cap-mmc-highspeed;
21 cap-sd-highspeed;
22 disable-wp;
23 no-sdio;
24 no-mmc;
[all …]
H A Dpx30-engicam-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
15 vcc5v0_sys: vcc5v0-sys {
16 compatible = "regulator-fixed";
17 regulator-name = "vcc5v0_sys"; /* +5V */
18 regulator-always-on;
19 regulator-boot-o
[all...]
/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drockchip-radxa-dalang-carrier.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/pwm/pwm.h>
11 clkin_gmac: external-gmac-clock {
12 compatible = "fixed-clock";
13 clock-frequency = <125000000>;
14 clock-output-names = "clkin_gmac";
15 #clock-cells = <0>;
18 sdio_pwrseq: sdio-pwrseq {
19 compatible = "mmc-pwrseq-simple";
21 clock-names = "ext_clock";
[all …]
H A Drk3288-veyron-sdmmc.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
15 sdcard-supply = <&vccio_sd>;
24 sdmmc_bus4: sdmmc-bus4 {
31 sdmmc_clk: sdmmc-clk {
35 sdmmc_cmd: sdmmc-cmd {
45 sdmmc_cd_disabled: sdmmc-cd-disabled {
50 sdmmc_cd_pin: sdmmc-cd-pin {
57 vcc9-supply = <&vcc_5v>;
61 regulator-name = "vccio_sd";
62 regulator-min-microvolt = <1800000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dste-href.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 ST-Ericsson AB
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/leds/common.h>
8 #include "ste-hre
[all...]
/freebsd/sys/contrib/device-tree/src/riscv/microchip/
H A Dmpfs-polarberry.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2022 Microchip Technology Inc */
4 /dts-v1/;
7 #include "mpfs-polarberry-fabric.dtsi"
19 stdout-path = "serial0:115200n8";
38 phy-mode = "sgmii";
39 phy-handl
[all...]
H A Dmpfs-sev-kit.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 /dts-v1/;
7 #include "mpfs-sev-kit-fabric.dtsi"
10 #address-cells = <2>;
11 #size-cells = <2>;
12 model = "Microchip PolarFire-So
[all...]
H A Dmicrochip-mpfs-icicle-kit.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
4 /dts-v1/;
6 #include "microchip-mpfs.dtsi"
12 model = "Microchip PolarFire-SoC Icicle Kit";
13 compatible = "microchip,mpfs-icicle-kit", "microchip,mpfs";
25 stdout-path = "serial1:115200n8";
29 timebase-frequency = <RTCCLK_FREQ>;
48 clock-frequency = <125000000>;
70 bus-width = <4>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/intel/socfpga/
H A Dsocfpga_arria10_socdk_sdmmc.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2014-2015 Altera Corporation <www.altera.com>
6 /dts-v1/;
11 cap-sd-highspeed;
12 cap-mmc-highspeed;
13 broken-cd;
14 bus-width = <4>;
15 clk-phase-sd-hs = <0>, <135>;
19 sdmmca-ecc@ff8c2c00 {
20 compatible = "altr,socfpga-sdmmc-ecc";
[all …]
H A Dsocfpga_arria5.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
16 clock-frequency = <25000000>;
22 broken-cd;
23 bus-width = <4>;
24 cap-mmc-highspeed;
25 cap-sd-highspeed;
26 clk-phase-sd-hs = <0>, <135>;
30 cpu1-start-addr = <0xffd080c4>;
H A Dsocfpga_cyclone5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
16 clock-frequency = <25000000>;
22 broken-cd;
23 bus-width = <4>;
24 cap-mmc-highspeed;
25 cap-sd-highspeed;
26 clk-phase-sd-hs = <0>, <135>;
30 cpu1-start-addr = <0xffd080c4>;
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-gxbb-p20x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "meson-gxbb.dtsi"
17 stdout-path = "serial0:115200n8";
25 usb_pwr: regulator-usb-pwrs {
26 compatible = "regulator-fixed";
28 regulator-name = "USB_PWR";
30 regulator-min-microvolt = <5000000>;
31 regulator-max-microvolt = <5000000>;
35 enable-active-high;
38 vddio_card: gpio-regulator {
[all …]
/freebsd/sys/contrib/device-tree/src/arm/amlogic/
H A Dmeson8m2-mxiii-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Oleg Ivanov <balbes-150@yandex.ru>
7 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
16 compatible = "tronsmart,mxiii-plus", "amlogic,meson8m2";
26 stdout-path = "serial0:115200n8";
34 adc-keys {
35 compatible = "adc-keys";
36 io-channels = <&saradc 0>;
[all …]
/freebsd/sys/contrib/device-tree/src/mips/ingenic/
H A Djz4770.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4770-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cell
[all...]

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