/freebsd/sys/contrib/device-tree/Bindings/mmc/ |
H A D | ingenic,mmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/ingenic,mmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Ingenic SoCs MMC Controller 10 - Paul Cercueil <paul@crapouillou.net> 13 - $ref: mmc-controller.yaml# 18 - enum: 19 - ingenic,jz4740-mmc 20 - ingenic,jz4725b-mmc [all …]
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H A D | mmci.txt | 7 by mmc.txt and the properties used by the mmci driver. Using "st" as 11 - compatible : contains "arm,pl18x", "arm,primecell". 12 - vmmc-supply : phandle to the regulator device tree node, mentioned 16 - arm,primecell-periphid : contains the PrimeCell Peripheral ID, it overrides 18 - resets : phandle to internal reset line. 20 - vqmmc-supply : phandle to the regulator device tree node, mentioned 23 - st,sig-dir-dat0 : bus signal direction pin used for DAT[0]. 24 - st,sig-dir-dat2 : bus signal direction pin used for DAT[2]. 25 - st,sig-dir-dat31 : bus signal direction pin used for DAT[3] and DAT[1]. 26 - st,sig-dir-dat74 : bus signal direction pin used for DAT[4] to DAT[7]. [all …]
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H A D | arm,pl18x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/arm,pl18x.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 11 - Ulf Hansson <ulf.hansson@linaro.org> 16 vendors have use the VHDL code from ARM to create derivative MMC/SD/SDIO 20 - $ref: /schemas/arm/primecell.yaml# 21 - $ref: mmc-controller.yaml# 29 - arm,pl180 [all …]
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H A D | cavium-mmc.txt | 1 * Cavium Octeon & ThunderX MMC controller 3 The highspeed MMC host controller on Caviums SoCs provides an interface 4 for MMC and SD types of memory cards. 10 - compatible : should be one of: 11 cavium,octeon-6130-mmc 12 cavium,octeon-7890-mmc 13 cavium,thunder-8190-mmc 14 cavium,thunder-8390-mmc 15 mmc-slot 16 - reg : mmc controller base registers [all …]
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H A D | k3-dw-mshc.txt | 4 Read synopsys-dw-mshc.txt for more details 7 a SoC with storage medium such as eMMC or SD/MMC cards. This file documents 9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific 15 - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions. 16 - "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc": for controllers 18 - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions. 19 - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions. 22 - hisilicon,peripheral-syscon: phandle of syscon used to control peripheral. 30 compatible = "hisilicon,hi4511-dw-mshc"; 33 #address-cells = <1>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/qcom/ |
H A D | qcom-msm8660.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/interrupt-controller/irq.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/clock/qcom,gcc-msm8660.h> 7 #include <dt-bindings/soc/qcom,gsbi.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 interrupt-parent = <&intc>; 17 #address-cells = <1>; [all …]
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/freebsd/sys/contrib/device-tree/src/mips/ingenic/ |
H A D | jz4770.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ingenic,jz4770-cgu.h> 3 #include <dt-bindings/clock/ingenic,tcu.h> 6 #address-cells = <1>; 7 #size-cells = <1>; 11 #address-cells = <1>; 12 #size-cell [all...] |
H A D | jz4725b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ingenic,jz4725b-cgu.h> 3 #include <dt-bindings/clock/ingenic,tcu.h> 6 #address-cells = <1>; 7 #size-cells = <1>; 11 #address-cells = <1>; 12 #size-cell [all...] |
H A D | x1830.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ingenic,tcu.h> 3 #include <dt-bindings/clock/ingenic,x1830-cgu.h> 4 #include <dt-bindings/dma/x1830-dma.h> 7 #address-cells = <1>; 8 #size-cells = <1>; 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "ingenic,xburst-fpu2.0-mxu2.0"; 21 clock-names = "cpu"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/rockchip/ |
H A D | rockchip-radxa-dalang-carrier.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/pwm/pwm.h> 11 clkin_gmac: external-gmac-clock { 12 compatible = "fixed-clock"; 13 clock-frequency = <125000000>; 14 clock-output-names = "clkin_gmac"; 15 #clock-cells = <0>; 18 sdio_pwrseq: sdio-pwrseq { 19 compatible = "mmc-pwrseq-simple"; 21 clock-names = "ext_clock"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
H A D | rk3308-rock-s0.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include <dt-bindings/leds/common.h> 10 compatible = "radxa,rock-s0", "rockchip,rk3308"; 20 stdout-path = "serial0:1500000n8"; 24 compatible = "gpio-leds"; 25 pinctrl-names = "default"; 26 pinctrl-0 = <&pwr_led>; 28 led-green { 30 default-state = "on"; [all …]
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H A D | rk3566-radxa-zero-3w.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include "rk3566-radxa-zero-3.dtsi" 9 compatible = "radxa,zero-3w", "rockchip,rk3566"; 17 sdio_pwrseq: sdio-pwrseq { 18 compatible = "mmc-pwrseq-simple"; 20 clock-names = "ext_clock"; 21 pinctrl-names = "default"; 22 pinctrl-0 = <&wifi_reg_on_h>; 23 post-power-on-delay-ms = <100>; [all …]
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H A D | rk3328-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 11 compatible = "rockchip,rk3328-evb", "rockchip,rk3328"; 21 stdout-path = "serial2:1500000n8"; 24 dc_12v: dc-12v { 25 compatible = "regulator-fixed"; 26 regulator-name = "dc_12v"; 27 regulator-alway [all...] |
H A D | rk3308-rock-pi-s.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include <dt-bindings/leds/common.h> 24 stdout-path = "serial0:1500000n8"; 28 compatible = "gpio-leds"; 29 pinctrl-names = "default"; 30 pinctrl-0 = <&green_led>, <&heartbeat_led>; 32 green-led { 34 default-state = "on"; 38 linux,default-trigger = "default-on"; [all …]
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H A D | rk3568-fastrhino-r66s.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 #include "rk3568-fastrhino-r66s.dtsi" 7 compatible = "lunzn,fastrhino-r66s", "rockchip,rk3568"; 15 vccio3-supply = <&vccio_sd>; 19 bus-width = <4>; 20 cap-mmc-highspeed; 21 cap-sd-highspeed; 22 disable-wp; 23 no-sdio; 24 no-mmc; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/intel/socfpga/ |
H A D | socfpga_arria10_socdk_sdmmc.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2014-2015 Altera Corporation <www.altera.com> 6 /dts-v1/; 9 &mmc { 11 cap-sd-highspeed; 12 cap-mmc-highspeed; 13 broken-cd; 14 bus-width = <4>; 15 clk-phase-sd-hs = <0>, <135>; 19 sdmmca-ecc@ff8c2c00 { [all …]
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H A D | socfpga_arria5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 16 clock-frequency = <25000000>; 21 mmc0: mmc@ff704000 { 22 broken-cd; 23 bus-width = <4>; 24 cap-mmc-highspeed; 25 cap-sd-highspeed; 26 clk-phase-sd-hs = <0>, <135>; 30 cpu1-start-addr = <0xffd080c4>;
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H A D | socfpga_cyclone5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 /dts-v1/; 16 clock-frequency = <25000000>; 21 mmc0: mmc@ff704000 { 22 broken-cd; 23 bus-width = <4>; 24 cap-mmc-highspeed; 25 cap-sd-highspeed; 26 clk-phase-sd-hs = <0>, <135>; 30 cpu1-start-addr = <0xffd080c4>;
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/freebsd/sys/contrib/device-tree/src/arm/st/ |
H A D | ste-href.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright 2012 ST-Ericsson AB 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/leds/common.h> 8 #include "ste-hre [all...] |
/freebsd/sys/contrib/device-tree/src/arm/amlogic/ |
H A D | meson8m2-mxiii-plus.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright (c) 2018 Oleg Ivanov <balbes-150@yandex.ru> 7 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 16 compatible = "tronsmart,mxiii-plus", "amlogic,meson8m2"; 26 stdout-path = "serial0:115200n8"; 34 adc-keys { 35 compatible = "adc-keys"; 36 io-channels = <&saradc 0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/amlogic/ |
H A D | meson-gxl-s905x-p212.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Based on meson-gx-p23x-q20x.dtsi: 5 * - Copyright (c) 2016 Endless Computers, Inc. 7 * - Copyright (c) 2016 BayLibre, SAS. 13 #include "meson-gxl-s905x.dtsi" 22 stdout-path = "serial0:115200n8"; 30 hdmi_5v: regulator-hdmi-5v { 31 compatible = "regulator-fixed"; 33 regulator-name = "HDMI_5V"; 34 regulator-min-microvolt = <5000000>; [all …]
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H A D | meson-gxl-s905x-nexbox-a95x.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-gxl-s905x.dtsi" 13 compatible = "nexbox,a95x", "amlogic,s905x", "amlogic,meson-gxl"; 22 stdout-path = "serial0:115200n8"; 30 vddio_card: gpio-regulator { 31 compatible = "regulator-gpio"; 33 regulator-name = "VDDIO_CARD"; 34 regulator-min-microvolt = <1800000>; 35 regulator-max-microvolt = <3300000>; [all …]
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H A D | meson-gxbb-p20x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include "meson-gxbb.dtsi" 17 stdout-path = "serial0:115200n8"; 25 usb_pwr: regulator-usb-pwrs { 26 compatible = "regulator-fixed"; 28 regulator-name = "USB_PWR"; 30 regulator-min-microvolt = <5000000>; 31 regulator-max-microvolt = <5000000>; 35 enable-active-high; 38 vddio_card: gpio-regulator { [all …]
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H A D | meson-gxl-s905w-jethome-jethub-j80.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 10 /dts-v1/; 12 #include "meson-gxl.dtsi" 15 compatible = "jethome,jethub-j80", "amlogic,s905w", "amlogic,meson-gxl"; 22 reserved-memory { 37 stdout-path = "serial0:115200n8"; 40 vddio_ao18: regulator-vddio-ao18 { 41 compatible = "regulator-fixed"; 42 regulator-name = "VDDIO_AO18"; 43 regulator-min-microvolt = <1800000>; [all …]
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/freebsd/sys/contrib/device-tree/src/riscv/microchip/ |
H A D | mpfs-polarberry.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 2 /* Copyright (c) 2020-2022 Microchip Technology Inc */ 4 /dts-v1/; 7 #include "mpfs-polarberry-fabric.dtsi" 19 stdout-path = "serial0:115200n8"; 38 phy-mode = "sgmii"; 39 phy-handl [all...] |