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/linux/drivers/clk/imx/
H A Dclk-imx35.c69 /* 29 */ nfc_div, asrc_gate, pata_gate, audmux_gate, can1_gate, enumerator
167 clk[can1_gate] = imx_clk_gate2("can1_gate", "ipg", base + MX35_CCM_CGR0, 6); in _mx35_clocks_init()
/linux/Documentation/devicetree/bindings/clock/
H A Dimx35-clock.yaml52 can1_gate 33
/linux/include/dt-bindings/clock/
H A Dnuvoton,ma35d1-clk.h56 #define CAN1_GATE 42 macro
/linux/drivers/clk/zynq/
H A Dclkc.c89 static const char *const can1_mio_mux2_parents[] __initconst = {"can1_gate",
454 clk_register_gate(NULL, "can1_gate", "can_div1", in zynq_clk_setup()
/linux/drivers/clk/nuvoton/
H A Dclk-ma35d1.c568 hws[CAN1_GATE] = ma35d1_clk_gate(dev, "can1_gate", "can1_div", in ma35d1_clocks_probe()