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/linux/tools/perf/pmu-events/arch/x86/tigerlake/
H A D	floating-point.json	12 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 16 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 21 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 25 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 30 … FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 34 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 39 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 43 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 48 …T DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 52 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/rocketlake/
H A D	floating-point.json	12 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 16 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 21 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 25 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 30 … FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 34 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 39 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 43 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 48 …T DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 52 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/icelakex/
H A D	floating-point.json	12 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 16 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 21 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 25 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 30 … FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 34 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 39 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 43 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 48 …T DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 52 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/icelake/
H A D	floating-point.json	12 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 16 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 21 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 25 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 30 … FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 34 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 39 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 43 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 48 …T DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 52 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… [all …]
/linux/tools/power/cpupower/bench/
H A D	benchmark.c	71 * governor and compares the used time for same calculations done 84 unsigned int calculations; in start_benchmark() local 109 calculations = calculate_timespace(load_time, config); in start_benchmark() 112 printf("_round %i: doing %u cycles with %u calculations" in start_benchmark() 114 calculations, load_time); in start_benchmark() 121 load_time / calculations, in start_benchmark() 122 1000000 * calculations / load_time); in start_benchmark() 128 ROUNDS(calculations); in start_benchmark() 136 load_time, calculations); in start_benchmark() 154 ROUNDS(calculations); in start_benchmark() [all …]
/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A D	floating-point.json	77 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 81 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 86 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 90 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 95 … FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 99 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 104 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 108 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 113 …T DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 117 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/emeraldrapids/
H A D	floating-point.json	77 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 81 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 86 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 90 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 95 … FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 99 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 104 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 108 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 113 …T DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 117 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/graniterapids/
H A D	floating-point.json	77 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 81 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 86 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 90 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 95 … FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 99 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 104 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 108 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 113 …T DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 117 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A D	floating-point.json	3 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 7 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 12 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 4 calculations per element.", 16 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 21 … FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 4 calculations per element.", 25 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 30 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 8 calculations per element.", 34 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 39 …T DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 43 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A D	floating-point.json	3 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 7 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 12 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 4 calculations per element.", 16 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 21 … FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 4 calculations per element.", 25 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 30 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 8 calculations per element.", 34 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 39 …T DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 43 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/broadwell/
H A D	floating-point.json	3 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 7 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 12 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 4 calculations per element.", 16 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 21 … FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 4 calculations per element.", 25 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 30 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 8 calculations per element.", 34 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 39 …T DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 43 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A D	floating-point.json	7 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 16 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 25 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 34 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 39 …T DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 43 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 48 …4 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 52 …FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 57 …4 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 61 …FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A D	floating-point.json	7 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 16 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 25 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 34 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 39 …T DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 43 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 48 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 52 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. T… 57 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 61 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/alderlake/
H A D	floating-point.json	104 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 108 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 114 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 118 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 124 … FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 128 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 134 …D/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 138 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 144 …T DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 148 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… [all …]
/linux/tools/perf/pmu-events/arch/x86/meteorlake/
H A D	floating-point.json	114 "BriefDescription": "Counts number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 118 "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.", 124 "BriefDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 128 "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.", 134 "BriefDescription": "Counts number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 138 "PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.", 144 "BriefDescription": "Counts number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 148 "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.", 154 "BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed double precision FP instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, 1 for each element. Applies to SSE* and AVX* packed single precision and packed double precision FP instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 158 "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations pe [all...]
/linux/tools/perf/pmu-events/arch/x86/skylake/
H A D	floating-point.json	7 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 16 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 25 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 34 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 39 …T DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 43 …SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 52 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 61 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th… 70 …M(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. Th…
/linux/tools/perf/pmu-events/arch/x86/pantherlake/
H A D	floating-point.json	97 "BriefDescription": "Counts number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 101 "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.", 107 "BriefDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 111 "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.", 117 "BriefDescription": "Counts number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 121 "PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.", 127 "BriefDescription": "Counts number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 131 "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.", 137 "BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed double precision FP instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, 1 for each element. Applies to SSE* and AVX* packed single precision and packed double precision FP instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 141 "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations pe [all...]
/linux/tools/perf/pmu-events/arch/x86/arrowlake/
H A D	floating-point.json	215 "BriefDescription": "Counts number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 219 "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.", 225 "BriefDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 229 "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.", 235 "BriefDescription": "Counts number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 239 "PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 4 computation operations, one for each element. Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.", 245 "BriefDescription": "Counts number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.", 249 "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 8 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.", 255 "BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed double precision FP instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, 1 for each element. Applies to SSE* and AVX* packed single precision and packed double precision FP instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB count twice as they perform 2 calculations per element.", 259 "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision and 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below. Each count represents 2 or/and 4 computation operations, one for each element. Applies to SSE* and AVX* packed single precision floating-point and packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX RCP14 RSQRT14 SQRT DPP FM(N)ADD/SUB. DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations pe [all...]
/linux/lib/crc/
H A D	crc4.c	`3 * crc4.c - simple crc-4 calculations. 24 * in the crc calculations. 44 MODULE_DESCRIPTION("CRC4 calculations");`
/linux/fs/ubifs/
H A D	budget.c	`26 * When pessimistic budget calculations say that there is no enough space, 244 /* The calculations are rough and may end up with a negative number / in ubifs_calc_available() 630 Indexing overhead calculations are based on the following formula: in ubifs_reported_space() 674 * empty LEBs we may use more precise calculations than in ubifs_get_free_space_nolock() 679 * Note, the calculations below are similar to what we have in in ubifs_get_free_space_nolock()`
/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
H A D	channel.h	`20 /* conversion for phy txpwr calculations that use .25 dB units */`
/linux/net/dsa/
H A D	tag_hellcreek.c	`26 * avoid including it in calculations. That would lead to wrong in hellcreek_xmit()`
/linux/arch/arm/nwfpe/
H A D	fpmodule.inl	`30 address calculations. */`
/linux/lib/
H A D	test_fpu.c
/linux/fs/pstore/
H A D	ram_internal.h	`45 * RSLIB instance for doing ECC calculations`

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