Searched +full:c900 +full:- +full:aclint +full:- +full:sswi (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/interrupt-controller/thead,c900-aclint-sswi.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: ACLINT Supervisor-level Software Interrupt Device10 - Inochi Amaoto <inochiama@outlook.com>13 The SSWI device is a part of the ACLINT device. It provides14 supervisor-level IPI functionality for a set of HARTs on a supported16 HART connected to the SSWI device. See draft specification17 https://github.com/riscvarchive/riscv-aclint[all …]
1 // SPDX-License-Identifier: GPL-2.067 pr_err("%pfwP: no ACLINT SSWI context available\n", fwnode); in aclint_sswi_parse_irq()68 return -EINVAL; in aclint_sswi_parse_irq()86 return -ENOTSUPP; in aclint_sswi_parse_irq()93 return -EINVAL; in aclint_sswi_parse_irq()110 return -EINVAL; in aclint_sswi_probe()114 return -ENOMEM; in aclint_sswi_probe()116 /* Parse SSWI setting */ in aclint_sswi_probe()121 /* If mulitple SSWI devices are present, do not register irq again */ in aclint_sswi_probe()129 return -ENOENT; in aclint_sswi_probe()[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)7 #address-cells = <2>;8 #size-cells = <2>;11 #address-cells = <1>;12 #size-cells = <0>;13 timebase-frequency = <50000000>;18 i-cache-block-size = <64>;19 i-cache-size = <65536>;20 i-cache-sets = <512>;21 d-cache-block-size = <64>;[all …]