/linux/Documentation/devicetree/bindings/dma/ |
H A D | adi,axi-dmac.txt |
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H A D | arm-pl08x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vinod Koul <vkoul@kernel.org> 13 - $ref: /schemas/arm/primecell.yaml# 14 - $ref: dma-controller.yaml# 22 - arm,pl080 23 - arm,pl081 25 - compatible [all …]
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/linux/Documentation/devicetree/bindings/misc/ |
H A D | ifm-csi.txt | 1 IFM camera sensor interface on mpc5200 LocalPlus bus 4 - compatible: "ifm,o2d-csi" 5 - reg: specifies sensor chip select number and associated address range 6 - interrupts: external interrupt line number and interrupt sense mode 8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable" 10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor 12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25) 13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16) 14 - ifm,csi-wait-cycles: sensor bus wait cycles 17 - ifm,csi-byte-swap: if this property is present, the byte swapping on [all …]
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/linux/include/media/ |
H A D | v4l2-mediabus.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Media Bus API header 11 #include <linux/v4l2-mediabus.h> 17 * bus configuration parameter. One and only one bit of each group of flags 20 * reporting the media bus configuration. For example, it is invalid to set or 60 /* FIELD = 0/1 - Field1 (odd)/Field2 (even) */ 62 /* FIELD = 1/0 - Field 169 } bus; global() member [all...] |
/linux/drivers/media/platform/xilinx/ |
H A D | xilinx-vip.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2013-2015 Ideas on Board 6 * Copyright (C) 2013-2015 Xilinx, Inc. 18 #include <dt-bindings/media/xilinx-vip.h> 20 #include "xilinx-vip.h" 22 /* ----------------------------------------------------------------------------- 48 * xvip_get_format_by_code - Retrieve format information for a media bus code 49 * @code: the format media bus code 52 * given V4L2 media bus format @code, or ERR_PTR if no corresponding format can 62 if (format->code == code) in xvip_get_format_by_code() [all …]
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/linux/Documentation/devicetree/bindings/media/ |
H A D | ti,da850-vpif.txt | 2 ---------------------- 12 - compatible: must be "ti,da850-vpif" 13 - reg: physical base address and length of the registers set for the device; 14 - interrupts: should contain IRQ line for the VPIF 18 VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a 19 single 16-bit channel. It should contain one or two port child nodes 23 Documentation/devicetree/bindings/media/video-interfaces.txt. 25 Example using 2 8-bit input channels, one of which is connected to an 26 I2C-connected TVP5147 decoder: 29 compatible = "ti,da850-vpif"; [all …]
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H A D | st,stm32-dcmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/st,stm32-dcmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Hugues Fruchet <hugues.fruchet@foss.st.com> 14 const: st,stm32-dcmi 25 clock-names: 27 - const: mclk 32 dma-names: 34 - const: tx [all …]
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/linux/arch/sh/include/mach-se/mach/ |
H A D | mrshpc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 19 * PC-Card window open in mrshpc_setup_windows() 25 /* common mode & bus width 16bit SWAP = 1*/ in mrshpc_setup_windows() 28 /* common mode & bus width 16bit SWAP = 0*/ in mrshpc_setup_windows() 34 /* attribute mode & bus width 16bit SWAP = 1*/ in mrshpc_setup_windows() 37 /* attribute mode & bus width 16bit SWAP = 0*/ in mrshpc_setup_windows() 44 __raw_writew(0x0a00, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1*/ in mrshpc_setup_windows() 46 __raw_writew(0x0200, MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0*/ in mrshpc_setup_windows()
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/linux/Documentation/devicetree/bindings/bus/ |
H A D | nvidia,tegra20-gmi.txt | 1 Device tree bindings for NVIDIA Tegra Generic Memory Interface bus 3 The Generic Memory Interface bus enables memory transfers between internal and 10 - compatible : Should contain one of the following: 11 For Tegra20 must contain "nvidia,tegra20-gmi". 12 For Tegra30 must contain "nvidia,tegra30-gmi". 13 - reg: Should contain GMI controller registers location and length. 14 - clocks: Must contain an entry for each entry in clock-names. 15 - clock-names: Must include the following entries: "gmi" 16 - resets : Must contain an entry for each entry in reset-names. 17 - reset-names : Must include the following entries: "gmi" [all …]
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/linux/drivers/net/ethernet/intel/fm10k/ |
H A D | fm10k_common.c | 1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 2013 - 2018 Intel Corporation. */ 7 * fm10k_get_bus_info_generic - Generic set PCI bus info 10 * Gets the PCI bus info (speed, width, type) then calls helper function to 17 /* Get the maximum link width and speed from PCIe config space */ in fm10k_get_bus_info_generic() 22 hw->bus_caps.width = fm10k_bus_width_pcie_x1; in fm10k_get_bus_info_generic() 25 hw->bus_caps.width = fm10k_bus_width_pcie_x2; in fm10k_get_bus_info_generic() 28 hw->bus_caps.width = fm10k_bus_width_pcie_x4; in fm10k_get_bus_info_generic() 31 hw->bus_caps.width = fm10k_bus_width_pcie_x8; in fm10k_get_bus_info_generic() 34 hw->bus_caps.width = fm10k_bus_width_unknown; in fm10k_get_bus_info_generic() [all …]
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/linux/Documentation/devicetree/bindings/auxdisplay/ |
H A D | hit,hd44780.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <geert@linux-m68k.org> 14 LCDs that can display one or more lines of text. It exposes an M6800 bus 15 interface, which can be used in either 4-bit or 8-bit mode. By using a 24 data-gpios: 26 GPIO pins connected to the data signal lines DB0-DB7 (8-bit mode) or 27 DB4-DB7 (4-bit mode) of the LCD Controller's bus interface. 29 - maxItems: 4 [all …]
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/linux/Documentation/devicetree/bindings/mmc/ |
H A D | cavium-mmc.txt | 10 - compatible : should be one of: 11 cavium,octeon-6130-mmc 12 cavium,octeon-7890-mmc 13 cavium,thunder-8190-mmc 14 cavium,thunder-8390-mmc 15 mmc-slot 16 - reg : mmc controller base registers 17 - clocks : phandle 20 - for cd, bus-width and additional generic mmc parameters 22 - cavium,cmd-clk-skew : number of coprocessor clocks before sampling command [all …]
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H A D | atmel-hsmci.txt | 7 by mmc.txt and the properties used by the atmel-mci driver. 12 - compatible: should be "atmel,hsmci" 13 - #address-cells: should be one. The cell is the slot id. 14 - #size-cells: should be zero. 15 - at least one slot node 16 - clock-names: tuple listing input clock names. 18 - clocks: phandles to input clocks. 28 #address-cells = <1>; 29 #size-cells = <0>; 30 clock-names = "mci_clk"; [all …]
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/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6q-gw54xx.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 6 /dts-v1/; 8 #include "imx6qdl-gw54xx.dtsi" 9 #include <dt-bindings/media/tda1997x.h> 13 compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q"; 15 sound-digital { 16 compatible = "simple-audio-card"; 17 simple-audio-card,name = "tda1997x-audio"; 18 simple-audio-card,format = "i2s"; 19 simple-audio-card,bitclock-master = <&sound_codec>; [all …]
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/linux/arch/arm/boot/dts/aspeed/ |
H A D | aspeed-g6.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 6 #include <dt-bindings/clock/ast2600-clock.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&gic>; 47 #address-cells = <1>; 48 #size-cells = <0>; 49 enable-method = "aspeed,ast2600-smp"; [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | fsl-lx2160a-tqmlx2160a.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright (c) 2020-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 8 #include "fsl-lx2160a.dtsi" 11 reg_vcc3v3: regulator-vcc3v3 { 12 compatible = "regulator-fixed"; 13 regulator-name = "VCC3V3"; 14 regulator-min-microvolt = <3300000>; 15 regulator-max-microvolt = <3300000>; 16 regulator-always-on; [all …]
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H A D | fsl-ls1046a-tqmls1046a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright (c) 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 10 #include "fsl-ls1046a.dtsi" 14 num-cs = <2>; 18 compatible = "jedec,spi-nor"; 20 #address-cells = <1>; 21 #size-cells = <1>; 22 spi-max-frequency = <62500000>; 23 spi-rx-bus-width = <4>; [all …]
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H A D | fsl-ls1088a-tqmls1088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright (c) 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 10 #include "fsl-ls1088a.dtsi" 14 num-cs = <2>; 18 compatible = "jedec,spi-nor"; 20 #address-cells = <1>; 21 #size-cells = <1>; 22 spi-max-frequency = <62500000>; 23 spi-rx-bus-width = <4>; [all …]
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H A D | fsl-ls1088a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 11 /dts-v1/; 13 #include "fsl-ls1088a.dtsi" 17 compatible = "fsl,ls1088a-qds", "fsl,ls1088a"; 21 bus-num = <0>; 25 #address-cells = <1>; 26 #size-cells = <1>; 27 compatible = "jedec,spi-nor"; 29 spi-max-frequency = <1000000>; 33 #address-cells = <1>; [all …]
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/linux/Documentation/devicetree/bindings/i2c/ |
H A D | opencores,i2c-ocores.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/opencores,i2c-ocores.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Peter Korsgaard <peter@korsgaard.com> 11 - Andrew Lunn <andrew@lunn.ch> 14 - $ref: /schemas/i2c/i2c-controller.yaml# 19 - items: 20 - enum: 21 - sifive,fu740-c000-i2c # Opencore based IP block FU740-C000 SoC [all …]
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/linux/Documentation/devicetree/bindings/mips/cavium/ |
H A D | bootbus.txt | 1 * Boot Bus 3 The Octeon Boot Bus is a configurable parallel bus with 8 chip 7 - compatible: "cavium,octeon-3860-bootbus" 11 - reg: The base address of the Boot Bus' register bank. 13 - #address-cells: Must be <2>. The first cell is the chip select 16 - #size-cells: Must be <1>. 18 - ranges: There must be one one triplet of (child-bus-address, 19 parent-bus-address, length) for each active chip select. If the 27 - compatible: "cavium,octeon-3860-bootbus-config" 29 - cavium,cs-index: A single cell indicating the chip select that [all …]
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/linux/Documentation/devicetree/bindings/dma/xilinx/ |
H A D | xlnx,zynqmp-dma-1.0.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 15 - Michael Tretter <m.tretter@pengutronix.de> 16 - Harini Katakam <harini.katakam@amd.com> 17 - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> 20 - $ref: ../dma-controller.yaml# 23 "#dma-cells": 28 - amd,versal2-dma-1.0 [all …]
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/linux/Documentation/devicetree/bindings/ata/ |
H A D | cavium-compact-flash.txt | 3 The Cavium Compact Flash device is connected to the Octeon Boot Bus, 4 and is thus a child of the Boot Bus device. It can read and write 8 - compatible: "cavium,ebt3000-compact-flash"; 12 - reg: The base address of the CF chip select banks. Depending on 15 - cavium,bus-width: The width of the connection to the CF devices. Valid 18 - cavium,true-ide: Optional, if present the CF connection is in True IDE mode. 20 - cavium,dma-engine-handle: Optional, a phandle for the DMA Engine connected 24 compact-flash@5,0 { 25 compatible = "cavium,ebt3000-compact-flash"; 27 cavium,bus-width = <16>; [all …]
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/linux/arch/arm/boot/dts/samsung/ |
H A D | s5pv210-torbreck.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. 12 * NOTE: This file is completely based on original board file for mach-torbreck 17 /dts-v1/; 18 #include <dt-bindings/input/input.h> 34 pmic_ap_clk: clock-0 { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <32768>; 43 clock-frequency = <24000000>; [all …]
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/linux/Documentation/devicetree/bindings/spi/ |
H A D | nvidia,tegra210-quad.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/nvidia,tegra210-quad.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jonathan Hunter <jonathanh@nvidia.com> 14 - $ref: spi-controller.yaml# 19 - nvidia,tegra210-qspi 20 - nvidia,tegra186-qspi 21 - nvidia,tegra194-qspi [all …]
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