| /freebsd/sys/contrib/dev/iwlwifi/ |
| H A D | iwl-drv.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2005-2014, 2020-2021, 2023 Intel Corporation
4 * Copyright (C) 2013-2014 Intel Mobile Communications GmbH
15 #define NVM_RF_CFG_DASH_MSK(x) (x & 0x3) /* bits 0-1 */
16 #define NVM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-
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| /freebsd/share/man/man9/ |
| H A D | own.9 | 10 .\" derived from this software without specific prior written permission.
39 .Nd Dallas Semiconductor 1-Wire Network and Transport Interface
66 interface defines three sets of functions for interacting with 1-Wire
69 reserving the bus,
78 .Ss Bus Commands
79 The 1-Wire bus defines different layers of access to the devices on
80 the bus.
85 devices on the bus, or for a specific device.
92 .Bl -tag -width ".Va xxxx"
97 .Bl -tag -width indent
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| H A D | bhnd.9 | 1 .\" Copyright (c) 2015-2016 Landon Fuller <landonf@FreeBSD.org>
38 .Ss Bus Resource Functions
70 .Ss "Bus Space Functions"
330 .Fa "device_t bus" "const struct bhnd_core_match *desc"
392 .Bd -literal
398 .Bd -literal
406 .Bd -literal
414 .Bd -literal
417 .Bd -literal
427 .Bd -literal
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| H A D | device_get_ivars.9 | 1 .\" -*- nroff -*-
35 .Nd access bus private variables
46 function returns the bus-specific instance variables of a device.
50 function sets the bus-specific instance variables of a device.
52 Typically, only bus drivers will use these functions.
53 The kernel assumes that the bus driver will manage this memory, and no
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| H A D | BUS_READ_IVAR.9 | 1 .\" -*- nroff -*-
35 .Nd manipulate bus-specific device instance variables
44 These two methods manage a bus specific set of instance variables of
46 The intention is that each different type of bus
48 irqs for ISA bus etc.)
51 that makes it hard for a bus to add or remove variables without
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| H A D | BUS_ADD_CHILD.9 | 1 .\" -*- nroff -*-
42 routine in other contexts, although the behavior is bus specific.
48 however, the bus'
64 A panic will result when called for a bus that does not implement
66 Some buses require a special bus-specific routine to be called instead
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| /freebsd/lib/libdevctl/ |
| H A D | devctl.3 | 88 bus-specific address.
89 The following bus-specific address formats are currently supported:
90 .Bl -tag -offset indent
91 .It Sy pci Ns Fa domain Ns : Ns Fa bus Ns : Ns Fa slot Ns : Ns Fa function
94 .Fa bus ,
98 .It Sy pci Ns Fa bus Ns : Ns Fa slot Ns : Ns Fa function
100 .Fa bus ,
152 function re-enables a disabled device.
199 function rescans a bus device checking for devices that have been added or
226 function resets the specified device using bus-specific reset method.
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| /freebsd/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | i2c-opal.txt | 1 Device-tree bindings for I2C OPAL driver
2 ----------------------------------------
4 Most of the device node and properties layout is specific to the firmware and
6 perspective, the properties of use are "ibm,port-name" and "ibm,opal-id".
10 - reg: Port-id within a given master
11 - compatible: must be "ibm,opal-i2c"
12 - ibm,opal-id: Refers to a specific bus and used to identify it when calling
14 - bus-frequency: Operating frequency of the i2c bus (in HZ). Informational for
18 - ibm,port-name: Firmware provides this name that uniquely identifies the i2c
22 and depend on the specific hardware implementation. The example below depicts
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| /freebsd/sys/dev/isp/ |
| H A D | DriverManual.txt | 54 PCI and SBus SCSI cards, and now also drove the QLogic 2100 FC-AL HBA.
56 After this, ports to non-NetBSD platforms became interesting as well.
65 mode support has been added, and 2300 support as well as an FC-IP stack
71 Normally you design via top-down methodologies and set an initial goal
76 as I perceive them to be now- not necessarily what they started as.
90 as well as private loop and private loop, direct-attach topologies.
91 FC-IP support is also a goal.
105 code with platform specific defines. Instead, some reasonable layering
107 platform specific code.
119 The QLogic HBA cards all contain a tiny 16-bit RISC-like processor and
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| /freebsd/sys/kern/ |
| H A D | bus_if.m | 1 #-
2 # Copyright (c) 1998-2004 Doug Rabson
30 #include <sys/bus.h>
33 * @defgroup BUS bus - KObj methods for drivers of devices with children
38 INTERFACE bus;
53 null_remap_intr(device_t bus, device_t dev, u_int irq)
62 null_add_child(device_t bus, int order, const char *name,
67 "unit %d", device_get_nameunit(bus), name, unit);
71 null_reset_post(device_t bus, device_t dev)
77 null_reset_prepare(device_t bus, device_t dev)
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| /freebsd/sys/contrib/device-tree/Bindings/spi/ |
| H A D | spi-peripheral-props.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
12 controller specific like delay in clock or data lines, etc. These properties
13 need to be defined in the peripheral node because they are per-peripheral and
15 properties are listed here. The controller specific properties should go in
19 - Mark Brown <broonie@kernel.org>
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| H A D | spi-samsung.txt | 6 Required SoC Specific Properties:
8 - compatible: should be one of the following.
9 - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
10 - samsung,s3c6410-spi: for s3c6410 platforms
11 - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
12 - samsung,exynos5433-spi: for exynos5433 compatible controllers
13 - samsung,exynos7-spi: for exynos7 platforms <DEPRECATED>
15 - reg: physical base address of the controller and length of memory mapped
18 - interrupts: The interrupt number to the cpu. The interrupt specifier format
21 - dmas : Two or more DMA channel specifiers following the convention outlined
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| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | snps,dw-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pci
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| /freebsd/sys/contrib/device-tree/Bindings/mmc/ |
| H A D | arm,pl18x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Ulf Hansson <ulf.hansson@linaro.org>
20 - $ref: /schemas/arm/primecell.yaml#
21 - $ref: mmc-controller.yaml#
29 - arm,pl180
30 - arm,pl181
31 - arm,pl18x
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| H A D | exynos-dw-mshc.txt | 1 * Samsung Exynos specific extensions to the Synopsys Designware Mobile
7 by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific
13 - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
14 specific extensions.
15 - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
16 specific extensions.
17 - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
18 specific extensions.
19 - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
20 specific extensions.
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| H A D | mmci.txt | 11 - compatible : contains "arm,pl18x", "arm,primecell".
12 - vmmc-supply : phandle to the regulator device tree node, mentioned
16 - arm,primecell-periphid : contains the PrimeCell Peripheral ID, it overrides
18 - resets : phandle to internal reset line.
20 - vqmmc-supply : phandle to the regulator device tree node, mentioned
22 specific for ux500 variant:
23 - st,sig-dir-dat0 : bus signal direction pin used for DAT[0].
24 - st,sig-dir-dat2 : bus signal direction pin used for DAT[2].
25 - st,sig-dir-dat31 : bus signal direction pin used for DAT[3] and DAT[1].
26 - st,sig-dir-dat74 : bus signal direction pin used for DAT[4] to DAT[7].
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| /freebsd/sys/contrib/device-tree/Bindings/fsi/ |
| H A D | fsi.txt | 1 FSI bus & engine generic device tree bindings
4 The FSI bus is probe-able, so the OS is able to enumerate FSI slaves, and
6 nodes to probed engines. This allows for fsi engines to expose non-probeable
8 that is an I2C master - the I2C bus can be described by the device tree under
13 the fsi-master-* binding specifications.
15 Under the masters' nodes, we can describe the bus topology using nodes to
18 fsi-master {
19 /* top-level of FSI bus topology, bound to an FSI master driver and
20 * exposes an FSI bus */
22 fsi-slave@<link,id> {
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| /freebsd/share/man/man4/ |
| H A D | scsi.4 | 41 .Cd "options CAM_DEBUG_BUS=-1"
42 .Cd "options CAM_DEBUG_TARGET=-1"
43 .Cd "options CAM_DEBUG_LUN=-1"
76 .Bl -tag -width SCSI_NO_SENSE_STRINGS
120 Do not let the "kernel bloat" zealots get to you -- leave
143 When the kernel boots, it sends a bus reset to each
149 devices need some amount of time to recover from a bus reset.
184 .Bd -literal -offset indent
190 bus numbers can be wired down to specific controllers with
192 .Bd -literal -offset indent
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| H A D | firewire.4 | 1 .\" Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa
18 .\" derived from this software without specific prior written permission.
37 .Nd IEEE1394 High-performance Serial Bus
42 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
59 provides machine-independent bus support and raw drivers for
67 The controller attaches to a physical bus
73 Additional drivers can be attached to the bus.
82 bus specific parameters,
83 e.g., node ID, cycle master, isochronous resource manager and bus
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| /freebsd/sys/dev/bhnd/ |
| H A D | bhnd.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
41 #include <sys/bus.h>
45 #include <machine/bus.h>
63 BHND_IVAR_VENDOR, /**< Designer's JEP-106 manufacturer ID. */
69 BHND_IVAR_CORE_INDEX, /**< Bus-assigned core number */
70 BHND_IVAR_CORE_UNIT, /**< Bus-assigned core unit number,
73 BHND_IVAR_PMU_INFO, /**< Internal bus-managed PMU state */
107 * Per-core IOCTL flags common to all bhnd(4) cores.
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| H A D | bhnd_bus_if.m | 1 #-
2 # Copyright (c) 2015-2016 Landon Fuller <landonf@FreeBSD.org>
31 #include <sys/bus.h>
40 # bhnd(4) bus interface
258 return (-1);
286 * Return the bhnd(4) bus driver's device enumeration parser class.
288 * @param driver The bhnd bus driver instance.
295 * Register a shared bus @p provider for a given @p service.
304 * @retval non-zero if registering @p provider otherwise fails, a regular
389 * Return the active host bridge core for the bhnd bus, if any.
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| /freebsd/sys/contrib/device-tree/Bindings/display/ |
| H A D | mipi-dsi-bus.txt | 4 The MIPI Display Serial Interface specifies a serial bus and a protocol for
6 define the syntax used to represent a DSI bus in a device tree.
8 This document describes DSI bus-specific properties only or defines existing
9 standard properties in the context of the DSI bus.
11 Each DSI host provides a DSI bus. The DSI host controller's node contains a
12 set of properties that characterize the bus. Child nodes describe individual
13 peripherals on that bus.
21 In addition to the standard properties and those defined by the parent bus of
25 - #address-cells: The number of cells required to represent an address on the
26 bus. DSI peripherals are addressed using a 2-bit virtual channel number, so
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| /freebsd/usr.sbin/devctl/ |
| H A D | devctl.8 | 86 consists of a single command followed by command-specific arguments.
93 bus-specific address.
98 .Bl -tag -width indent
100 Force the kernel to re-probe the device.
127 Note that this can re-enable a device disabled at boot time via a
153 Clear a previously-forced driver name so that the device is able to use any
165 Rescan a bus device checking for devices that have been added or
177 can no longer be used unless the parent bus device rediscovers the device via
200 Reset the device, using bus-specific reset method.
207 For PCIe bus, the link is disabled and then re-trained, causing all
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| /freebsd/sys/contrib/device-tree/Bindings/bus/ |
| H A D | simple-pm-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/bus/simple-pm-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Simple Power-Managed Bus
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 A Simple Power-Managed Bus is a transparent bus that doesn't need a real
16 However, its bus controller is part of a PM domain, or under the control
17 of a functional clock. Hence, the bus controller's PM domain and/or
18 clock must be enabled for child devices connected to the bus (either
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| /freebsd/sys/dev/ichiic/ |
| H A D | ig4_reg.h | 20 * from this software without specific, prior written permission.
40 * https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/4th-gen-core-family-mobile-i-o-datasheet.pdf
42 * This is a from-scratch driver under the BSD license using the Intel data
61 * Register width is 32-bit
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