Home
last modified time | relevance | path

Searched +full:bus +full:- +full:power (Results 1 – 25 of 1066) sorted by relevance

12345678910>>...43

/freebsd/sys/contrib/device-tree/Bindings/bus/
H A Dsimple-pm-bus.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/bus/simple-pm-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Simple Power-Managed Bus
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 A Simple Power-Managed Bus is a transparent bus that doesn't need a real
16 However, its bus controller is part of a PM domain, or under the control
17 of a functional clock. Hence, the bus controller's PM domain and/or
18 clock must be enabled for child devices connected to the bus (either
[all …]
H A Dqcom,ssc-block-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/qcom,ssc-block-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: The AHB Bus Providing a Global View of the SSC Block on (some) qcom SoCs
10 - Michael Srba <Michael.Srba@seznam.cz>
13 This binding describes the dependencies (clocks, resets, power domains) which
14 need to be turned on in a sequence before communication over the AHB bus
27 - const: qcom,msm8998-ssc-block-bus
28 - const: qcom,ssc-block-bus
[all …]
H A Dfsl,imx8qxp-pixel-link-msi-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/fs
[all...]
/freebsd/sys/contrib/device-tree/Bindings/interconnect/
H A Dsamsung,exynos-bus.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interconnect/samsung,exynos-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC Bus and Interconnect
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
15 sub-blocks in SoC. Most Exynos SoCs share the common architecture for buses.
16 Generally, each bus of Exynos SoC includes a source clock and a power line,
17 which are able to change the clock frequency of the bus in runtime. To
[all …]
/freebsd/sys/contrib/device-tree/Bindings/devfreq/
H A Dexynos-bus.txt1 * Generic Exynos Bus frequency device
4 and sub-blocks in SoC. Most Exynos SoCs share the common architecture
5 for buses. Generally, each bus of Exynos SoC includes a source clock
6 and a power line, which are able to change the clock frequency
7 of the bus in runtime. To monitor the usage of each bus in runtime,
9 is able to measure the current load of sub-blocks.
11 The Exynos SoC includes the various sub-blocks which have the each AXI bus.
12 The each AXI bus has the owned source clock but, has not the only owned
13 power line. The power line might be shared among one more sub-blocks.
14 So, we can divide into two type of device as the role of each sub-block.
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/imx/
H A Dfsl,imx8mm-vpu-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM VPU blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the VPU peripherals
20 - const: fsl,imx8mm-vpu-blk-ctrl
21 - const: syscon
[all …]
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos5420.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 bus_disp1: bus-disp1 {
38 compatible = "samsung,exynos-bus";
40 clock-names = "bus";
44 bus_disp1_fimd: bus-disp1-fimd {
45 compatible = "samsung,exynos-bus";
47 clock-names = "bus";
[all …]
H A Dexynos4x12.dtsi1 // SPDX-License-Identifier: GPL-2.0
19 #include "exynos4-cpu-thermal.dtsi"
27 fimc-lite0 = &fimc_lite_0;
28 fimc-lite1 = &fimc_lite_1;
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bu
[all...]
H A Dexynos3250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include "exynos4-cpu-thermal.dtsi"
18 #include <dt-bindings/clock/exynos3250.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
46 bus_dmc: bus-dmc {
47 compatible = "samsung,exynos-bus";
[all …]
H A Dexynos4210.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
20 #include "exynos4-cpu-thermal.dtsi"
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bu
[all...]
/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-facebook-yosemite4.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/leds/leds-pca955x.h>
8 #include <dt-bindings/i2c/i2c.h>
12 compatible = "facebook,yosemite4-bmc", "aspeed,ast2600";
23 stdout-path = "serial4:57600n8";
31 iio-hwmon {
32 compatible = "iio-hwmon";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dqcom,sdm845-venus.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/qcom,sdm845-venus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stanimir Varbanov <stanimir.varbanov@linaro.org>
17 - $ref: qcom,venus-common.yaml#
21 const: qcom,sdm845-venus
23 power-domains:
29 clock-names:
31 - const: core
[all …]
H A Dsamsung-s5c73m3.txt2 ------------------------------
4 The S5C73M3 camera ISP supports MIPI CSI-2 and parallel (ITU-R BT.656) video
5 data busses. The I2C bus is the main control bus and additionally the SPI bus
7 slave device nodes corresponding to these control bus interfaces are required
8 and should be placed under respective bus controller nodes.
11 ---------------------
15 - compatible : "samsung,s5c73m3";
16 - reg : I2C slave address of the sensor;
17 - vdd-int-supply : digital power supply (1.2V);
18 - vdda-supply : analog power supply (1.2V);
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dnvidia,tegra20-pcie.txt4 - compatible: Must be:
5 - "nvidia,tegra20-pcie": for Tegra20
6 - "nvidia,tegra30-pcie": for Tegra30
7 - "nvidia,tegra124-pcie": for Tegra124 and Tegra132
8 - "nvidia,tegra210-pcie": for Tegra210
9 - "nvidia,tegra186-pcie": for Tegra186
10 - power-domains: To ungate power partition by BPMP powergate driver. Must
11 contain BPMP phandle and PCIe power partition ID. This is required only
13 - device_type: Must be "pci"
14 - reg: A list of physical base address and length for each set of controller
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
[all …]
H A Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/imx8mm-power.h>
11 #include <dt-bindings/reset/imx8mq-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mm-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/connector/
H A Dusb-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/connector/usb-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ro
[all...]
/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A Dqcom,msm8996-mss-pil.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,msm8996-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Sibi Sankar <quic_sibis@quicinc.com>
20 - qcom,msm8996-mss-pil
21 - qcom,msm8998-mss-pil
22 - qcom,sdm660-mss-pil
23 - qcom,sdm845-mss-pil
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/panel/
H A Dpanel-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Lauren
[all...]
H A Dpanel-edp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-edp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Douglas Anderson <dianders@chromium.org>
14 to a Embedded DisplayPort AUX bus (see display/dp-aux-bus.yaml) without
17 board, either for second-sourcing purposes or to support multiple SKUs
21 represented under the DP AUX bus. This means that we can use any
22 information provided by the DP AUX bus (including the EDID) to identify
27 provided anywhere on the DP AUX bus is the power sequencing timings.
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/xilinx/
H A Dzynqmp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2014 - 2021, Xilinx, Inc.
15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/power/xlnx-zynqmp-power.h>
20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
24 #address-cells = <2>;
25 #size-cells = <2>;
[all …]
/freebsd/sbin/camcontrol/
H A Dcamcontrol.8110 .Aq all | device id | bus Ns Op :target:lun
113 .Aq all | device id | bus Ns Op :target:lun
145 .Bk -words
195 .Aq all | off | device id | bus Ns Op :target Ns Op :lun
402 .Bl -tag -width 14n
405 .It bus:target
406 Specify a bus number and target id.
407 The bus number can be determined from
411 .It bus:target:lun
412 Specify the bus, target and lun for a device.
[all …]
/freebsd/sys/dev/acpica/
H A Dacpi_pci.c1 /*-
35 #include <sys/bus.h>
69 ACPI_SERIAL_DECL(pci_powerstate, "ACPI PCI power methods");
71 /* Be sure that ACPI and PCI power states are equivalent. */
95 static bus_dma_tag_t acpi_pci_get_dma_tag(device_t bus, device_t child);
104 /* Bus interface */
135 return (&dinfo->ap_dinfo); in acpi_pci_alloc_devinfo()
146 *result = (uintptr_t)dinfo->ap_handle; in acpi_pci_read_ivar()
149 *result = (uintptr_t)dinfo->ap_flags; in acpi_pci_read_ivar()
163 dinfo->ap_handle = (ACPI_HANDLE)value; in acpi_pci_write_ivar()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Dusb251xb.txt1 Microchip USB 2.0 Hi-Speed Hub Controller
4 Hi-Speed Controller.
7 - compatible : Should be "microchip,usb251xb" or one of the specific types:
11 - reg : I2C address on the selected bus (default is <0x2C>)
14 - reset-gpios : Should specify the gpio for hub reset
15 - vdd-supply : Should specify the phandle to the regulator supplying vdd
16 - skip-config : Skip Hub configuration, but only send the USB-Attach command
17 - vendor-id : Set USB Vendor ID of the hub (16 bit, default is 0x0424)
18 - product-id : Set USB Product ID of the hub (16 bit, default depends on type)
19 - device-id : Set USB Device ID of the hub (16 bit, default is 0x0bb3)
[all …]
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Drockchip,rk3399-dmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controller
[all...]

12345678910>>...43