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/linux/Documentation/devicetree/bindings/dma/
H A Drenesas,nbpfaxi.txt1 * Renesas "Type-AXI" NBPFAXI* DMA controllers
7 - compatible: must be one of
17 - #dma-cells: must be 2: the first integer is a terminal number, to which this
26 - max-burst-mem-read: limit burst size for memory reads
28 than using the maximum burst size allowed by the hardware's buffer size.
29 - max-burst-mem-write: limit burst size for memory writes
31 than using the maximum burst size allowed by the hardware's buffer size.
32 If both max-burst-mem-read and max-burst-mem-write are set, DMA_MEM_TO_MEM
35 You can use dma-channels and dma-requests as described in dma.txt, although they
40 dma: dma-controller@48000000 {
[all …]
H A Dimg-mdc-dma.txt1 * IMG Multi-threaded DMA Controller (MDC)
4 - compatible: Must be "img,pistachio-mdc-dma".
5 - reg: Must contain the base address and length of the MDC registers.
6 - interrupts: Must contain all the per-channel DMA interrupts.
7 - clocks: Must contain an entry for each entry in clock-names.
8 See ../clock/clock-bindings.txt for details.
9 - clock-names: Must include the following entries:
10 - sys: MDC system interface clock.
11 - img,cr-periph: Must contain a phandle to the peripheral control syscon
13 - img,max-burst-multiplier: Must be the maximum supported burst size multiplier.
[all …]
H A Darm-pl08x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
13 - $ref: /schemas/arm/primecell.yaml#
14 - $ref: dma-controller.yaml#
22 - arm,pl080
23 - arm,pl081
25 - compatible
[all …]
H A Dintel,ldma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - chuanhua.lei@intel.com
11 - mallikarjunax.reddy@intel.com
14 - $ref: dma-controller.yaml#
19 - intel,lgm-cdma
20 - intel,lgm-dma2tx
21 - intel,lgm-dma1rx
22 - intel,lgm-dma1tx
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/linux/drivers/net/ethernet/mscc/
H A Docelot_police.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 /* Types for ANA:POL[0-192]:POL_MODE_CFG.FRM_MODE */
17 #define POL_IX_PORT 0 /* 0-11 : Port policers */
18 #define POL_IX_QUEUE 32 /* 32-127 : Queue policers */
21 #define POL_ORDER 0x1d3 /* Ocelot policer order: Serial (QoS -> Port -> VCAP) */
33 pir = conf->pir; in qos_policer_conf_set()
34 pbs = conf->pbs; in qos_policer_conf_set()
36 switch (conf->mode) { in qos_policer_conf_set()
39 if (conf->mode == MSCC_QOS_RATE_MODE_LINE) { in qos_policer_conf_set()
41 ipg = min_t(u8, GENMASK(4, 0), conf->ipg); in qos_policer_conf_set()
[all …]
/linux/drivers/atm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
36 chipset such as the Speedstream 3010 and the ENI-25p. The
38 have the code to drive the on-board Alcatel DSL chipset (yet).
46 2MB on-board RAM (Efficient calls them "C" and "S", respectively),
48 The driver works with MMF (-MF or ...F) and UTP-5 (-U5 or ...D)
65 bool "Fine-tune burst settings"
69 multiple words of data per PCI bus access cycle. Such a multi-word
70 transfer is called a burst.
72 The default settings for the burst sizes are suitable for most PCI
76 The burst sizes can be set independently in the send (TX) and
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dsamsung-sxgbe.txt4 - compatible: Should be "samsung,sxgbe-v2.0a"
5 - reg: Address and length of the register set for the device
6 - interrupts: Should contain the SXGBE interrupts
9 index 0 - this is fixed common interrupt of SXGBE and it is always
11 index 1 to 25 - 8 variable transmit interrupts, variable 16 receive interrupts
13 - phy-mode: String, operation mode of the PHY interface.
15 - samsung,pbl: Integer, Programmable Burst Length.
17 - samsung,burst-map: Integer, Program the possible bursts supported by sxgbe
18 This is an integer and represents allowable DMA bursts when fixed burst.
19 Allowable range is 0x01-0x3F. When this field is set fixed burst is enabled.
[all …]
H A Dsnps,dwc-qos-ethernet.txt13 - compatible: One of:
14 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10"
15 Represents the IP core when integrated into the Axis ARTPEC-6 SoC.
16 - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10"
18 - "snps,dwc-qos-ethernet-4.10"
20 "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10". It is supported to be
22 - reg: Address and length of the register set for the device
23 - clocks: Phandle and clock specifiers for each entry in clock-names, in the
24 same order. See ../clock/clock-bindings.txt.
25 - clock-names: May contain any/all of the following depending on the IP
[all …]
/linux/Documentation/devicetree/bindings/memory-controllers/fsl/
H A Dfsl,imx-weim.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
16 wireless and mobile applications that use low-power technology. The actual
21 pattern: "^memory-controller@[0-9a-f]+$"
25 - enum:
26 - fsl,imx1-weim
[all …]
/linux/Documentation/devicetree/bindings/arm/
H A Darm,coresight-tmc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-tmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
32 const: arm,coresight-tmc
34 - compatible
[all …]
/linux/arch/sparc/include/asm/
H A Ddma.h1 /* SPDX-License-Identifier: GPL-2.0 */
38 #define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */
50 #define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */
55 #define DMA_E_BURSTS 0x000c0000 /* ENET: SBUS r/w burst mask */
56 #define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */
57 #define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */
58 #define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */
62 #define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */
66 #define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */
75 /* Values describing the burst-size property from the PROM */
[all …]
/linux/net/netfilter/
H A Dnft_limit.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2008-2009 Patrick McHardy <kaber@trash.net>
28 u32 burst; member
37 spin_lock_bh(&priv->limit->lock); in nft_limit_eval()
39 tokens = priv->limit->tokens + now - priv->limit->last; in nft_limit_eval()
40 if (tokens > priv->tokens_max) in nft_limit_eval()
41 tokens = priv->tokens_max; in nft_limit_eval()
43 priv->limit->last = now; in nft_limit_eval()
44 delta = tokens - cost; in nft_limit_eval()
46 priv->limit->tokens = delta; in nft_limit_eval()
[all …]
/linux/drivers/net/ethernet/mellanox/mlxsw/
H A Dspectrum_policer.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
61 /* Provided burst size is in bytes. The ASIC burst size value is in mlxsw_sp_policer_burst_bytes_hw_units()
62 * (2 ^ bs) * 512 bits. Convert the provided size to 512-bit units. in mlxsw_sp_policer_burst_bytes_hw_units()
69 return fls64(bs512) - 1; in mlxsw_sp_policer_burst_bytes_hw_units()
76 return atomic_read(&family->policers_count); in mlxsw_sp_policer_single_rate_occ_get()
82 struct mlxsw_core *core = family->mlxsw_sp->core; in mlxsw_sp_policer_single_rate_family_init()
90 return -EIO; in mlxsw_sp_policer_single_rate_family_init()
92 family->start_index = MLXSW_CORE_RES_GET(core, MAX_CPU_POLICERS); in mlxsw_sp_policer_single_rate_family_init()
93 family->end_index = MLXSW_CORE_RES_GET(core, MAX_GLOBAL_POLICERS); in mlxsw_sp_policer_single_rate_family_init()
95 atomic_set(&family->policers_count, 0); in mlxsw_sp_policer_single_rate_family_init()
[all …]
/linux/include/linux/iio/imu/
H A Dadis.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
28 * struct adis_timeouts - ADIS chip variant timeouts
29 * @reset_ms - Wait time after rst pin goes inactive
30 * @sw_reset_ms - Wait time after sw reset command
31 * @self_test_ms - Wai
245 adis_write_reg(struct adis * adis,unsigned int reg,unsigned int val,unsigned int size) adis_write_reg() argument
259 adis_read_reg(struct adis * adis,unsigned int reg,unsigned int * val,unsigned int size) adis_read_reg() argument
352 adis_update_bits_base(struct adis * adis,unsigned int reg,const u32 mask,const u32 val,u8 size) adis_update_bits_base() argument
[all...]
/linux/include/uapi/linux/netfilter/
H A Dxt_hashlimit.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
16 /* packet length accounting is done in 16-byte steps */
35 __u32 burst; /* Period multiplier for upper limit. */ member
38 __u32 size; /* how many buckets */ member
59 __u32 burst; /* Period multiplier for upper limit. */ member
62 __u32 size; /* how many buckets */ member
72 __u64 burst; /* Period multiplier for upper limit. */ member
76 __u32 size; /* how many buckets */ member
86 __u64 burst; /* Period multiplier for upper limit. */ member
90 __u32 size; /* how many buckets */ member
/linux/arch/arm/boot/dts/ti/omap/
H A Domap2420-n8x0-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 stdout-path = &uart3;
16 compatible = "i2c-cbus-gpio";
21 #address-cells = <1>;
22 #size-cells = <0>;
25 interrupt-parent = <&gpio4>;
34 clock-frequency = <400000>;
44 clock-frequency = <400000>;
50 /* gpio-irq for dma: 26 */
53 #address-cells = <1>;
[all …]
H A Domap3-gta04a5one.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-18 H. Nikolaus Schaller <hns@goldelico.com>
6 #include "omap3-gta04a5.dts"
13 gpmc_pins: gpmc-pins {
14 pinctrl-single,pins = <
45 pinctrl-names = "default";
46 pinctrl-0 = <&gpmc_pins>;
48 /delete-node/ nand@0,0;
52 #address-cells = <1>;
53 #size-cells = <1>;
[all …]
/linux/tools/testing/selftests/drivers/net/netdevsim/
H A Ddevlink_trap.sh2 # SPDX-License-Identifier: GPL-2.0
4 # This test is for checking devlink-trap functionality. It makes use of
40 if [ ! -d "$NETDEVSIM_PATH" ]; then
45 if [ -d "${NETDEVSIM_PATH}/devices/netdevsim${DEV_ADDR}" ]; then
54 if [ $((state & 1)) -ne 0 ]; then
65 test $(devlink_traps_num_get) -ne 0
80 # The action of non-drop traps cannot be changed.
137 check_fail $? "Did not get an error for non-existing trap"
139 log_test "Non-existing trap"
154 check_fail $? "Did not get an error for non-existing trap action"
[all …]
/linux/samples/pktgen/
H A Dparameters.sh2 # SPDX-License-Identifier: GPL-2.0
8 echo "Usage: $0 [-vx] -i ethX"
9 echo " -i : (\$DEV) output interface/device (required)"
10 echo " -s : (\$PKT_SIZE) packet size"
11 echo " -d : (\$DEST_IP) destination IP. CIDR (e.g. 198.18.0.0/15) is also allowed"
12 echo " -m : (\$DST_MAC) destination MAC-addr"
13 echo " -p : (\$DST_PORT) destination PORT range (e.g. 433-444) is also allowed"
14 echo " -k : (\$UDP_CSUM) enable UDP tx checksum"
15 echo " -t : (\$THREADS) threads to start"
16 echo " -f : (\$F_THREAD) index of first thread (zero indexed CPU number)"
[all …]
/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Dtc_restrictions.sh2 # SPDX-License-Identifier: GPL-2.0
41 # It is forbidden in mlxsw driver to have mixed-bound
90 # egress-bound block.
172 # bound on egress. Spectrum-1 specific restriction
199 # On ingress, all matchall-mirror and matchall-sample
254 # On egress, all matchall-mirror rules have to be behind the flower rules
320 action police rate 0.5kbit burst 1m conform-exceed drop/ok
325 action police rate 2.5tbit burst 1g conform-exceed drop/ok
330 action police rate 1.5kbit burst 1m conform-exceed drop/ok
337 action police rate 1.9tbit burst 1g conform-exceed drop/ok
[all …]
/linux/sound/soc/kirkwood/
H A Dkirkwood-dma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * kirkwood-dma.c
6 * (c) 2010 Arnaud Patard <arnaud.patard@rtp-net.org>
15 #include <linux/dma-mapping.h>
46 mask = readl(priv->io + KIRKWOOD_INT_MASK); in kirkwood_dma_irq()
47 status = readl(priv->io + KIRKWOOD_INT_CAUSE) & mask; in kirkwood_dma_irq()
49 cause = readl(priv->io + KIRKWOOD_ERR_CAUSE); in kirkwood_dma_irq()
53 writel(cause, priv->io + KIRKWOOD_ERR_CAUSE); in kirkwood_dma_irq()
65 writel(status, priv->io + KIRKWOOD_INT_CAUSE); in kirkwood_dma_irq()
68 snd_pcm_period_elapsed(priv->substream_play); in kirkwood_dma_irq()
[all …]
/linux/drivers/net/ethernet/microchip/lan966x/
H A Dlan966x_police.c1 // SPDX-License-Identifier: GPL-2.0+
5 /* 0-8 : 9 port policers */
8 /* Policer order: Serial (QoS -> Port -> VCAP) */
15 u32 burst; member
22 struct lan966x *lan966x = port->lan966x; in lan966x_police_add()
25 pol->rate = DIV_ROUND_UP(pol->rate * 3, 100); in lan966x_police_add()
26 /* Avoid zero burst size */ in lan966x_police_add()
27 pol->burst = pol->burst ?: 1; in lan966x_police_add()
29 pol->burst = DIV_ROUND_UP(pol->burst, 4096); in lan966x_police_add()
31 if (pol->rate > GENMASK(15, 0) || in lan966x_police_add()
[all …]
/linux/drivers/misc/
H A Ddw-xdata-pcie.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/pci-epf.h>
20 #define DW_XDATA_DRIVER_NAME "dw-xdata-pcie"
75 return dw->rg_region.vaddr; in __dw_regs()
80 u32 burst; in dw_xdata_stop() local
82 mutex_lock(&dw->mutex); in dw_xdata_stop()
84 burst = readl(&(__dw_regs(dw)->burst_cnt)); in dw_xdata_stop()
86 if (burst & BURST_REPEAT) { in dw_xdata_stop()
87 burst &= ~(u32)BURST_REPEAT; in dw_xdata_stop()
88 writel(burst, &(__dw_regs(dw)->burst_cnt)); in dw_xdata_stop()
[all …]
/linux/Documentation/devicetree/bindings/display/panel/
H A Draydium,rm67191.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Raydium RM67171 OLED LCD panel with MIPI-DSI protocol
10 - Robert Chiras <robert.chiras@nxp.com>
13 - $ref: panel-common.yaml#
23 reset-gpios: true
24 width-mm: true
25 height-mm: true
27 dsi-lanes:
[all …]
/linux/drivers/usb/host/
H A Dxhci-mtk.h1 /* SPDX-License-Identifier: GPL-2.0 */
21 /* support at most 64 ep, use 32 size hash table */
31 #define XHCI_MTK_BW_INDEX(x) ((x) & (XHCI_MTK_MAX_ESIT - 1))
41 * @in_ss_cnt: the count of Start-Split for IN eps
68 * @esit: unit is 125us, equal to 2 << Interval field in ep-context
78 * @maxpkt: max packet size of endpoint
90 * @burst_mode: burst mode for scheduling. 0: normal burst mode,
91 * distribute the bMaxBurst+1 packets for a single burst
92 * according to @pkts and @repeat, repeate the burst multiple
180 return dev_get_drvdata(hcd->self.controller); in hcd_to_mtk()

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