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/linux/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_cmdbuf.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
4 * Copyright 2015-2023 VMware, Inc., Palo Alto, CA., USA
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
42 (1024 - ALIGN(sizeof(SVGACBHeader), VMW_CMDBUF_INLINE_ALIGN))
45 * struct vmw_cmdbuf_context - Command buffer context queues
48 * manager but not yet submitted to hardware.
63 * struct vmw_cmdbuf_man - Command buffer manager
65 * @cur_mutex: Mutex protecting the command buffer used for incremental small
68 * main pool buffer space.
72 * @work: A struct work_struct implementeing command buffer error handling.
[all …]
H A Dvmwgfx_cmdbuf_res.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
4 * Copyright 2014-2022 VMware, Inc., Palo Alto, CA., USA
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
36 * struct vmw_cmdbuf_res - Command buffer managed resource entry.
39 * @hash: Hash entry for the manager hash table.
40 * @head: List head used either by the staging list or the manager list
43 * @man: Pointer to a resource manager for this entry.
54 * struct vmw_cmdbuf_res_manager - Command buffer resource manager.
56 * @resources: Hash table containing staged and committed command buffer
58 * @list: List of committed command buffer resources.
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/linux/drivers/accel/habanalabs/common/
H A Dmemory_mgr.c1 // SPDX-License-Identifier: GPL-2.0
11 * hl_mmap_mem_buf_get - increase the buffer refcount and return a pointer to
12 * the buffer descriptor.
14 * @mmg: parent unified memory manager
15 * @handle: requested buffer handle
17 * Find the buffer in the store and return a pointer to its descriptor.
18 * Increase buffer refcount. If not found - return NULL.
24 spin_lock(&mmg->lock); in hl_mmap_mem_buf_get()
25 buf = idr_find(&mmg->handles, lower_32_bits(handle >> PAGE_SHIFT)); in hl_mmap_mem_buf_get()
27 spin_unlock(&mmg->lock); in hl_mmap_mem_buf_get()
[all …]
H A Dstate_dump.c1 // SPDX-License-Identifier: GPL-2.0
13 * hl_format_as_binary - helper function, format an integer as binary
14 * using supplied scratch buffer
15 * @buf: the buffer to use
16 * @buf_len: buffer capacity
19 * Returns pointer to buffer
37 buf_len -= 3; in hl_format_as_binary()
43 bit = n & (1 << (sizeof(n) * BITS_PER_BYTE - 1)); in hl_format_as_binary()
58 * resize_to_fit - helper function, resize buffer to fit given amount of data
59 * @buf: destination buffer double pointer
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/linux/Documentation/driver-api/fpga/
H A Dfpga-programming.rst1 In-kernel API for FPGA Programming
5 --------
7 The in-kernel API for FPGA programming is a combination of APIs from
8 FPGA manager, bridge, and regions. The actual function used to
12 the FPGA manager and bridges. It will:
15 * lock the mutex of the region's FPGA manager
18 * program the FPGA using info passed in :c:expr:`fpga_region->info`.
19 * re-enable the bridges
27 -------------------------------------
29 When the FPGA region driver probed, it was given a pointer to an FPGA manager
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/linux/include/drm/ttm/
H A Dttm_device.h39 * struct ttm_global - Buffer object driver global data.
50 * @device_list: List of buffer object devices. Protected by
56 * @bo_count: Number of buffer objects allocated by devices.
65 * @bo: The buffer object to create the ttm for.
83 * -ENOMEM: Out of memory.
113 * @bo: the buffer object to be evicted
124 * @bo: the buffer object to be evicted
126 * Return the bo flags for a buffer which is not mapped to the hardware.
128 * finished, they'll end up in bo->mem.flags
139 * @bo: the buffer to move
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/linux/Documentation/gpu/
H A Ddrm-mm.rst6 frame buffers, textures, vertices and other graphics-related data. Given
11 The DRM core includes two memory managers, namely Translation Table Manager
12 (TTM) and Graphics Execution Manager (GEM). TTM was the first DRM memory
13 manager to be developed and tried to be a one-size-fits-them all
20 GEM started as an Intel-sponsored project in reaction to TTM's
22 providing a solution to every graphics memory-related problems, GEM
28 The Translation Table Manager (TTM)
31 .. kernel-doc:: drivers/gpu/drm/ttm/ttm_module.c
34 .. kernel-doc:: include/drm/ttm/ttm_caching.h
38 ---------------------------
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/linux/Documentation/devicetree/bindings/net/
H A Dmarvell,armada-370-neta.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/marvell,armada-370-neta.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marcin Wojtas <marcin.s.wojtas@gmail.com>
13 - $ref: /schemas/net/ethernet-controller.yaml#
18 - marvell,armada-370-neta
19 - marvell,armada-xp-neta
20 - marvell,armada-3700-neta
21 - marvell,armada-ac5-neta
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/linux/arch/arm/boot/dts/marvell/
H A Darmada-xp-openblocks-ax3-4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for OpenBlocks AX3-4 board
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include "armada-xp-mv78260.dtsi"
16 model = "PlatHome OpenBlocks AX3-4 board";
17 …compatible = "plathome,openblocks-ax3-4", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell…
20 stdout-path = "serial0:115200n8";
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H A Darmada-xp-gp.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-MV784MP-GP)
6 * Copyright (C) 2013-2014 Marvell
9 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
15 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
22 /dts-v1/;
23 #include <dt-bindings/gpio/gpio.h>
24 #include "armada-xp-mv78460.dtsi"
27 model = "Marvell Armada XP Development Board DB-MV784MP-GP";
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H A Darmada-xp-db.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * (DB-78460-BP)
6 * Copyright (C) 2012-2014 Marvell
9 * Gregory CLEMENT <gregory.clement@free-electrons.com>
10 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
16 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
23 /dts-v1/;
24 #include "armada-xp-mv78460.dtsi"
28 …compatible = "marvell,axp-db", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370…
31 stdout-path = "serial0:115200n8";
[all …]
H A Darmada-385-db-ap.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * (DB-88F6820-AP)
11 /dts-v1/;
12 #include "armada-385.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
18 compatible = "marvell,a385-db-ap", "marvell,armada385", "marvell,armada380";
21 stdout-path = "serial1:115200n8";
36 internal-regs {
38 pinctrl-names = "default";
39 pinctrl-0 = <&i2c0_pins>;
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/linux/include/linux/soc/ti/
H A Dti-msgmgr.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Texas Instruments' Message Manager
5 * Copyright (C) 2015-2022 Texas Instruments Incorporated - https://www.ti.com/
15 * struct ti_msgmgr_message - Message Manager structure
16 * @len: Length of data in the Buffer
17 * @buf: Buffer pointer
22 * the length of data buffer used depends on the SoC integration
23 * parameters - each message may be 64, 128 bytes long depending
/linux/drivers/net/ethernet/freescale/dpaa/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
10 Depends on Freescale Buffer Manager and Queue Manager
11 driver and Frame Manager Driver.
/linux/drivers/crypto/intel/qat/qat_common/
H A Dadf_gen4_ras.h1 /* SPDX-License-Identifier: GPL-2.0-only */
51 * BIT(0) - BIT(3) - ri_iosf_pdata_rxq[0:3] parity error
52 * BIT(4) - ri_tlq_phdr parity error
53 * BIT(5) - ri_tlq_pdata parity error
54 * BIT(6) - ri_tlq_nphdr parity error
55 * BIT(7) - ri_tlq_npdata parity error
56 * BIT(8) - BIT(9) - ri_tlq_cplhdr[0:1] parity error
57 * BIT(10) - BIT(17) - ri_tlq_cpldata[0:7] parity error
58 * BIT(18) - set this bit to 1 to enable logging status to ri_mem_par_err_sts0
59 * BIT(19) - ri_cds_cmd_fifo parity error
[all …]
/linux/Documentation/networking/device_drivers/ethernet/freescale/
H A Ddpaa.rst1 .. SPDX-License-Identifier: GPL-2.0
8 - Madalin Bucur <madalin.bucur@nxp.com>
9 - Camelia Groza <camelia.groza@nxp.com>
13 - DPAA Ethernet Overview
14 - DPAA Ethernet Supported SoCs
15 - Configuring DPAA Ethernet in your kernel
16 - DPAA Ethernet Frame Processing
17 - DPAA Ethernet Features
18 - DPAA IRQ Affinity and Receive Side Scaling
19 - Debugging
[all …]
/linux/drivers/fpga/tests/
H A Dfpga-mgr-test.c1 // SPDX-License-Identifier: GPL-2.0
3 * KUnit test for the FPGA Manager
12 #include <linux/fpga/fpga-mgr.h>
58 * init_test_buffer() - Allocate and initialize a test image in a buffer.
74 memset(buf + HEADER_SIZE, IMAGE_FILL, count - HEADER_SIZE); in init_test_buffer()
81 * since, in this case, it is a failure of the FPGA manager itself, not this
87 struct mgr_stats *stats = mgr->priv; in op_parse_header()
90 stats->op_parse_header_state = mgr->state; in op_parse_header()
91 stats->op_parse_header_seq = stats->seq_num++; in op_parse_header()
94 info->header_size = HEADER_SIZE; in op_parse_header()
[all …]
/linux/security/tomoyo/
H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2005-2011 NTT DATA CORPORATION
173 /* Permit policy management by non-root user? */
179 * tomoyo_addprintf - strncat()-like-snprintf().
181 * @buffer: Buffer to write to. Must be '\0'-terminated.
182 * @len: Size of @buffer.
188 static void tomoyo_addprintf(char *buffer, int len, const char *fmt, ...) in tomoyo_addprintf() argument
191 const int pos = strlen(buffer); in tomoyo_addprintf()
194 vsnprintf(buffer + pos, len - pos - 1, fmt, args); in tomoyo_addprintf()
199 * tomoyo_flush - Flush queued string to userspace's buffer.
[all …]
/linux/drivers/media/pci/mantis/
H A Dmantis_evm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
30 struct mantis_pci *mantis = ca->ca_priv; in mantis_hifevm_work()
38 dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): CAM Plugin", mantis->num); in mantis_hifevm_work()
41 dvb_ca_en50221_camchange_irq(&ca->en50221, in mantis_hifevm_work()
47 dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): CAM Unplug", mantis->num); in mantis_hifevm_work()
50 dvb_ca_en50221_camchange_irq(&ca->en50221, in mantis_hifevm_work()
56 if (mantis->gpif_status & MANTIS_GPIF_EXTIRQ) in mantis_hifevm_work()
57 dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): Ext IRQ", mantis->num); in mantis_hifevm_work()
59 if (mantis->gpif_status & MANTIS_SBUF_WSTO) in mantis_hifevm_work()
60 dprintk(MANTIS_DEBUG, 1, "Event Mgr: Adapter(%d) Slot(0): Smart Buffer Timeout", mantis->num); in mantis_hifevm_work()
[all …]
/linux/drivers/soc/fsl/qbman/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 The Buffer Manager (BMan) is a hardware buffer pool management block
17 The Queue Manager (QMan) is a hardware queue management block
26 Compiles in additional checks, to sanity-check the drivers and
30 tristate "BMan self-tests"
32 Compile the BMan self-test code. These tests will
37 bool "High-level API self-test"
41 This requires the presence of cpu-affine portals, and performs
42 high-level API testing with them (whichever portal(s) are affine
46 tristate "QMan self-tests"
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/linux/Documentation/devicetree/bindings/soc/fsl/
H A Dfsl,bman.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: QorIQ DPAA Buffer Manager
10 - Frank Li <Frank.Li@nxp.com>
13 The Buffer Manager is part of the Data-Path Acceleration Architecture (DPAA).
21 - const: fsl,bman
22 - items:
23 - enum:
24 - fsl,ls1043a-bman
[all …]
H A Dfsl,bman-portal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/fsl,bman-portal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: QorIQ DPAA Queue Manager Portals
10 - Frank Li <Frank.Li@nxp.com>
13 QorIQ DPAA Buffer Manager Portal
15 Portals are memory mapped interfaces to BMan that allow low-latency, lock-less
22 - const: fsl,bman-portal
23 - items:
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/linux/drivers/gpu/drm/radeon/
H A Dradeon_object.h35 * radeon_mem_type_to_domain - return domain corresponding to mem_type
56 * radeon_bo_reserve - reserve bo
58 * @no_intr: don't return -ERESTARTSYS on pending signal
61 * -ERESTARTSYS: A wait for the buffer to become unreserved was interrupted by
62 * a signal. Release all buffer reservations and return to user-space.
68 r = ttm_bo_reserve(&bo->tbo, !no_intr, false, NULL); in radeon_bo_reserve()
70 if (r != -ERESTARTSYS) in radeon_bo_reserve()
71 dev_err(bo->rdev->dev, "%p reserve failed\n", bo); in radeon_bo_reserve()
79 ttm_bo_unreserve(&bo->tbo); in radeon_bo_unreserve()
83 * radeon_bo_gpu_offset - return GPU offset of bo
[all …]
H A Dradeon_sa.c15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
55 domain, flags, NULL, NULL, &sa_manager->bo); in radeon_sa_bo_manager_init()
57 dev_err(rdev->dev, "(%d) failed to allocate bo for manager\n", r); in radeon_sa_bo_manager_init()
61 sa_manager->domain = domain; in radeon_sa_bo_manager_init()
63 drm_suballoc_manager_init(&sa_manager->base, size, sa_align); in radeon_sa_bo_manager_init()
71 drm_suballoc_manager_fini(&sa_manager->base); in radeon_sa_bo_manager_fini()
72 radeon_bo_unref(&sa_manager->bo); in radeon_sa_bo_manager_fini()
80 if (sa_manager->bo == NULL) { in radeon_sa_bo_manager_start()
81 dev_err(rdev->dev, "no bo for sa manager\n"); in radeon_sa_bo_manager_start()
82 return -EINVAL; in radeon_sa_bo_manager_start()
[all …]
/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_vram_mgr.c25 #include <linux/dma-mapping.h>
46 return container_of(man, struct amdgpu_vram_mgr, manager); in to_vram_mgr()
70 while (head != block->link.next) { in amdgpu_is_vram_mgr_blocks_contiguous()
74 block = list_entry(block->link.next, struct drm_buddy_block, link); in amdgpu_is_vram_mgr_blocks_contiguous()
107 return sysfs_emit(buf, "%llu\n", adev->gmc.real_vram_size); in amdgpu_mem_info_vram_total_show()
124 return sysfs_emit(buf, "%llu\n", adev->gmc.visible_vram_size); in amdgpu_mem_info_vis_vram_total_show()
141 struct ttm_resource_manager *man = &adev->mman.vram_mgr.manager; in amdgpu_mem_info_vram_used_show()
162 amdgpu_vram_mgr_vis_usage(&adev->mman.vram_mgr)); in amdgpu_mem_info_vis_vram_used_show()
180 switch (adev->gmc.vram_vendor) { in amdgpu_mem_info_vram_vendor()
234 !adev->gmc.vram_vendor) in amdgpu_vram_attrs_is_visible()
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