Searched +full:bt1 +full:- +full:pcie (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/pci/baikal,bt1-pcie.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Baikal-T1 PCIe Root Port Controller10 - Serge Semin <fancer.lancer@gmail.com>13 Embedded into Baikal-T1 SoC Root Complex controller with a single port14 activated. It's based on the DWC RC PCIe v4.60a IP-core, which is configured18 performed by software. There four in- and four outbound iATU regions19 which can be used to emit all required TLP types on the PCIe bus.[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)4 ---5 $id: http://devicetree.org/schemas/clock/baikal,bt1-ccu-div.yaml#6 $schema: http://devicetree.org/meta-schemas/core.yaml#8 title: Baikal-T1 Clock Control Unit Dividers11 - Serge Semin <fancer.lancer@gmail.com>14 Clocks Control Unit is the core of Baikal-T1 SoC System Controller18 IP-blocks or to groups of blocks (clock domains). The transformation is done19 by means of an embedded into CCU PLLs and gateable/non-gateable dividers. The22 registers. Baikal-T1 CCU is logically divided into the next components:[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)4 ---5 $id: http://devicetree.org/schemas/clock/baikal,bt1[all...]